[llvm-branch-commits] [llvm-branch] r84649 - in /llvm/branches/Apple/Leela: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll

Bill Wendling isanbard at gmail.com
Tue Oct 20 10:53:28 PDT 2009


Author: void
Date: Tue Oct 20 12:53:28 2009
New Revision: 84649

URL: http://llvm.org/viewvc/llvm-project?rev=84649&view=rev
Log:
$ svn merge -c 84640 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r84640 into '.':
A    test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
U    lib/Target/X86/X86ISelLowering.cpp


Added:
    llvm/branches/Apple/Leela/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
      - copied unchanged from r84640, llvm/trunk/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
Modified:
    llvm/branches/Apple/Leela/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/branches/Apple/Leela/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/X86/X86ISelLowering.cpp?rev=84649&r1=84648&r2=84649&view=diff

==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/X86/X86ISelLowering.cpp Tue Oct 20 12:53:28 2009
@@ -2286,6 +2286,8 @@
   case ISD::SETNE:   return X86::COND_NE;
   case ISD::SETUO:   return X86::COND_P;
   case ISD::SETO:    return X86::COND_NP;
+  case ISD::SETOEQ:
+  case ISD::SETUNE:  return X86::COND_INVALID;
   }
 }
 
@@ -5502,6 +5504,8 @@
 
   bool isFP = Op.getOperand(1).getValueType().isFloatingPoint();
   unsigned X86CC = TranslateX86CC(CC, isFP, Op0, Op1, DAG);
+  if (X86CC == X86::COND_INVALID)
+    return SDValue();
 
   SDValue Cond = EmitCmp(Op0, Op1, X86CC, DAG);
   return DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
@@ -5650,8 +5654,11 @@
   DebugLoc dl = Op.getDebugLoc();
   SDValue CC;
 
-  if (Cond.getOpcode() == ISD::SETCC)
-    Cond = LowerSETCC(Cond, DAG);
+  if (Cond.getOpcode() == ISD::SETCC) {
+    SDValue NewCond = LowerSETCC(Cond, DAG);
+    if (NewCond.getNode())
+      Cond = NewCond;
+  }
 
   // If condition flag is set by a X86ISD::CMP, then use it as the condition
   // setting operand in place of the X86ISD::SETCC.
@@ -5724,8 +5731,11 @@
   DebugLoc dl = Op.getDebugLoc();
   SDValue CC;
 
-  if (Cond.getOpcode() == ISD::SETCC)
-    Cond = LowerSETCC(Cond, DAG);
+  if (Cond.getOpcode() == ISD::SETCC) {
+    SDValue NewCond = LowerSETCC(Cond, DAG);
+    if (NewCond.getNode())
+      Cond = NewCond;
+  }
 #if 0
   // FIXME: LowerXALUO doesn't handle these!!
   else if (Cond.getOpcode() == X86ISD::ADD  ||
@@ -6274,6 +6284,7 @@
     SDValue LHS = Op.getOperand(1);
     SDValue RHS = Op.getOperand(2);
     unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);
+    assert(X86CC != X86::COND_INVALID && "Unexpected illegal condition!");
     SDValue Cond = DAG.getNode(Opc, dl, MVT::i32, LHS, RHS);
     SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
                                 DAG.getConstant(X86CC, MVT::i8), Cond);





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