[llvm-branch-commits] [llvm-branch] r89794 - in /llvm/branches/Apple/Zoidberg: include/llvm/CodeGen/LatencyPriorityQueue.h include/llvm/CodeGen/ScheduleDAG.h include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/AggressiveAntiDepBreaker.cpp lib/CodeGen/AggressiveAntiDepBreaker.h lib/CodeGen/AntiDepBreaker.h lib/CodeGen/CriticalAntiDepBreaker.cpp lib/CodeGen/CriticalAntiDepBreaker.h lib/CodeGen/LatencyPriorityQueue.cpp lib/CodeGen/PostRASchedulerList.cpp lib/CodeGen/ScheduleDAG.cpp lib/Target/ARM/ARMScheduleV7.td
Bill Wendling
isanbard at gmail.com
Tue Nov 24 11:42:43 PST 2009
Author: void
Date: Tue Nov 24 13:42:43 2009
New Revision: 89794
URL: http://llvm.org/viewvc/llvm-project?rev=89794&view=rev
Log:
$ svn merge -c 89471 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r89471 into '.':
U include/llvm/CodeGen/LatencyPriorityQueue.h
U include/llvm/CodeGen/ScheduleDAG.h
U lib/CodeGen/CriticalAntiDepBreaker.h
U lib/CodeGen/ScheduleDAG.cpp
U lib/CodeGen/CriticalAntiDepBreaker.cpp
U lib/CodeGen/LatencyPriorityQueue.cpp
U lib/CodeGen/AggressiveAntiDepBreaker.cpp
U lib/CodeGen/PostRASchedulerList.cpp
U lib/CodeGen/AntiDepBreaker.h
U lib/CodeGen/AggressiveAntiDepBreaker.h
$ svn merge -c 89511 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r89511 into '.':
U include/llvm/Target/TargetRegisterInfo.h
G lib/CodeGen/AggressiveAntiDepBreaker.cpp
$ svn merge -c 89672 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r89672 into '.':
U lib/Target/ARM/ARMScheduleV7.td
$ svn merge -c 89722 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r89722 into '.':
G lib/CodeGen/AggressiveAntiDepBreaker.cpp
Modified:
llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/LatencyPriorityQueue.h
llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/ScheduleDAG.h
llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetRegisterInfo.h
llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h
llvm/branches/Apple/Zoidberg/lib/CodeGen/AntiDepBreaker.h
llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h
llvm/branches/Apple/Zoidberg/lib/CodeGen/LatencyPriorityQueue.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/PostRASchedulerList.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/ScheduleDAG.cpp
llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMScheduleV7.td
Modified: llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/LatencyPriorityQueue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/LatencyPriorityQueue.h?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/LatencyPriorityQueue.h (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/LatencyPriorityQueue.h Tue Nov 24 13:42:43 2009
@@ -40,18 +40,11 @@
/// mobility.
std::vector<unsigned> NumNodesSolelyBlocking;
- /// IgnoreAntiDep - Ignore anti-dependencies
- bool IgnoreAntiDep;
-
/// Queue - The queue.
PriorityQueue<SUnit*, std::vector<SUnit*>, latency_sort> Queue;
public:
- LatencyPriorityQueue() : IgnoreAntiDep(false), Queue(latency_sort(this)) {
- }
-
- void setIgnoreAntiDep(bool ignore) {
- IgnoreAntiDep = ignore;
+ LatencyPriorityQueue() : Queue(latency_sort(this)) {
}
void initNodes(std::vector<SUnit> &sunits) {
@@ -72,7 +65,7 @@
unsigned getLatency(unsigned NodeNum) const {
assert(NodeNum < (*SUnits).size());
- return (*SUnits)[NodeNum].getHeight(IgnoreAntiDep);
+ return (*SUnits)[NodeNum].getHeight();
}
unsigned getNumSolelyBlockNodes(unsigned NodeNum) const {
Modified: llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/ScheduleDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/ScheduleDAG.h?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/ScheduleDAG.h (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/ScheduleDAG.h Tue Nov 24 13:42:43 2009
@@ -340,34 +340,30 @@
void removePred(const SDep &D);
/// getDepth - Return the depth of this node, which is the length of the
- /// maximum path up to any node with has no predecessors. If IgnoreAntiDep
- /// is true, ignore anti-dependence edges.
- unsigned getDepth(bool IgnoreAntiDep=false) const {
+ /// maximum path up to any node with has no predecessors.
+ unsigned getDepth() const {
if (!isDepthCurrent)
- const_cast<SUnit *>(this)->ComputeDepth(IgnoreAntiDep);
+ const_cast<SUnit *>(this)->ComputeDepth();
return Depth;
}
/// getHeight - Return the height of this node, which is the length of the
- /// maximum path down to any node with has no successors. If IgnoreAntiDep
- /// is true, ignore anti-dependence edges.
- unsigned getHeight(bool IgnoreAntiDep=false) const {
+ /// maximum path down to any node with has no successors.
+ unsigned getHeight() const {
if (!isHeightCurrent)
- const_cast<SUnit *>(this)->ComputeHeight(IgnoreAntiDep);
+ const_cast<SUnit *>(this)->ComputeHeight();
return Height;
}
/// setDepthToAtLeast - If NewDepth is greater than this node's
/// depth value, set it to be the new depth value. This also
- /// recursively marks successor nodes dirty. If IgnoreAntiDep is
- /// true, ignore anti-dependence edges.
- void setDepthToAtLeast(unsigned NewDepth, bool IgnoreAntiDep=false);
+ /// recursively marks successor nodes dirty.
+ void setDepthToAtLeast(unsigned NewDepth);
/// setDepthToAtLeast - If NewDepth is greater than this node's
/// depth value, set it to be the new height value. This also
- /// recursively marks predecessor nodes dirty. If IgnoreAntiDep is
- /// true, ignore anti-dependence edges.
- void setHeightToAtLeast(unsigned NewHeight, bool IgnoreAntiDep=false);
+ /// recursively marks predecessor nodes dirty.
+ void setHeightToAtLeast(unsigned NewHeight);
/// setDepthDirty - Set a flag in this node to indicate that its
/// stored Depth value will require recomputation the next time
@@ -400,8 +396,8 @@
void print(raw_ostream &O, const ScheduleDAG *G) const;
private:
- void ComputeDepth(bool IgnoreAntiDep);
- void ComputeHeight(bool IgnoreAntiDep);
+ void ComputeDepth();
+ void ComputeHeight();
};
//===--------------------------------------------------------------------===//
Modified: llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetRegisterInfo.h?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetRegisterInfo.h Tue Nov 24 13:42:43 2009
@@ -465,7 +465,7 @@
virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0;
/// getSubRegIndex - For a given register pair, return the sub-register index
- /// if they are second register is a sub-register of the second. Return zero
+ /// if the are second register is a sub-register of the first. Return zero
/// otherwise.
virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const = 0;
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp Tue Nov 24 13:42:43 2009
@@ -28,11 +28,6 @@
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
-static cl::opt<int>
-AntiDepTrials("agg-antidep-trials",
- cl::desc("Maximum number of anti-dependency breaking passes"),
- cl::init(1), cl::Hidden);
-
// If DebugDiv > 0 then only break antidep with (ID % DebugDiv) == DebugMod
static cl::opt<int>
DebugDiv("agg-antidep-debugdiv",
@@ -118,7 +113,7 @@
MRI(MF.getRegInfo()),
TRI(MF.getTarget().getRegisterInfo()),
AllocatableSet(TRI->getAllocatableSet(MF)),
- State(NULL), SavedState(NULL) {
+ State(NULL) {
/* Collect a bitset of all registers that are only broken if they
are on the critical path. */
for (unsigned i = 0, e = CriticalPathRCs.size(); i < e; ++i) {
@@ -138,13 +133,6 @@
AggressiveAntiDepBreaker::~AggressiveAntiDepBreaker() {
delete State;
- delete SavedState;
-}
-
-unsigned AggressiveAntiDepBreaker::GetMaxTrials() {
- if (AntiDepTrials <= 0)
- return 1;
- return AntiDepTrials;
}
void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
@@ -216,8 +204,6 @@
void AggressiveAntiDepBreaker::FinishBlock() {
delete State;
State = NULL;
- delete SavedState;
- SavedState = NULL;
}
void AggressiveAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count,
@@ -251,10 +237,6 @@
}
}
DEBUG(errs() << '\n');
-
- // We're starting a new schedule region so forget any saved state.
- delete SavedState;
- SavedState = NULL;
}
bool AggressiveAntiDepBreaker::IsImplicitDefUse(MachineInstr *MI,
@@ -293,27 +275,20 @@
}
}
-/// AntiDepEdges - Return in Edges the anti- and output-
-/// dependencies on Regs in SU that we want to consider for breaking.
-static void AntiDepEdges(SUnit *SU,
- const AntiDepBreaker::AntiDepRegVector& Regs,
- std::vector<SDep*>& Edges) {
- AntiDepBreaker::AntiDepRegSet RegSet;
- for (unsigned i = 0, e = Regs.size(); i < e; ++i)
- RegSet.insert(Regs[i]);
-
+/// AntiDepEdges - Return in Edges the anti- and output- dependencies
+/// in SU that we want to consider for breaking.
+static void AntiDepEdges(SUnit *SU, std::vector<SDep*>& Edges) {
+ SmallSet<unsigned, 4> RegSet;
for (SUnit::pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
P != PE; ++P) {
if ((P->getKind() == SDep::Anti) || (P->getKind() == SDep::Output)) {
unsigned Reg = P->getReg();
- if (RegSet.count(Reg) != 0) {
+ if (RegSet.count(Reg) == 0) {
Edges.push_back(&*P);
- RegSet.erase(Reg);
+ RegSet.insert(Reg);
}
}
}
-
- assert(RegSet.empty() && "Expected all antidep registers to be found");
}
/// CriticalPathStep - Return the next SUnit after SU on the bottom-up
@@ -606,85 +581,108 @@
return false;
}
- // FIXME: for now just handle single register in group case...
- if (Regs.size() > 1) {
- DEBUG(errs() << "\tMultiple rename registers in group\n");
- return false;
+#ifndef NDEBUG
+ // If DebugDiv > 0 then only rename (renamecnt % DebugDiv) == DebugMod
+ if (DebugDiv > 0) {
+ static int renamecnt = 0;
+ if (renamecnt++ % DebugDiv != DebugMod)
+ return false;
+
+ errs() << "*** Performing rename " << TRI->getName(SuperReg) <<
+ " for debug ***\n";
}
+#endif
// Check each possible rename register for SuperReg in round-robin
// order. If that register is available, and the corresponding
// registers are available for the other group subregisters, then we
// can use those registers to rename.
- BitVector SuperBV = RenameRegisterMap[SuperReg];
const TargetRegisterClass *SuperRC =
TRI->getPhysicalRegisterRegClass(SuperReg, MVT::Other);
const TargetRegisterClass::iterator RB = SuperRC->allocation_order_begin(MF);
const TargetRegisterClass::iterator RE = SuperRC->allocation_order_end(MF);
if (RB == RE) {
- DEBUG(errs() << "\tEmpty Regclass!!\n");
+ DEBUG(errs() << "\tEmpty Super Regclass!!\n");
return false;
}
-#ifndef NDEBUG
- // If DebugDiv > 0 then only rename (renamecnt % DebugDiv) == DebugMod
- if (DebugDiv > 0) {
- static int renamecnt = 0;
- if (renamecnt++ % DebugDiv != DebugMod)
- return false;
-
- errs() << "*** Performing rename " << TRI->getName(SuperReg) <<
- " for debug ***\n";
- }
-#endif
+ DEBUG(errs() << "\tFind Registers:");
if (RenameOrder.count(SuperRC) == 0)
RenameOrder.insert(RenameOrderType::value_type(SuperRC, RE));
- DEBUG(errs() << "\tFind Register:");
-
const TargetRegisterClass::iterator OrigR = RenameOrder[SuperRC];
const TargetRegisterClass::iterator EndR = ((OrigR == RE) ? RB : OrigR);
TargetRegisterClass::iterator R = OrigR;
do {
if (R == RB) R = RE;
--R;
- const unsigned Reg = *R;
+ const unsigned NewSuperReg = *R;
// Don't replace a register with itself.
- if (Reg == SuperReg) continue;
-
- DEBUG(errs() << " " << TRI->getName(Reg));
+ if (NewSuperReg == SuperReg) continue;
- // If Reg is dead and Reg's most recent def is not before
- // SuperRegs's kill, it's safe to replace SuperReg with Reg. We
- // must also check all aliases of Reg. because we can't define a
- // register when any sub or super is already live.
- if (State->IsLive(Reg) || (KillIndices[SuperReg] > DefIndices[Reg])) {
- DEBUG(errs() << "(live)");
- continue;
- } else {
- bool found = false;
- for (const unsigned *Alias = TRI->getAliasSet(Reg);
- *Alias; ++Alias) {
- unsigned AliasReg = *Alias;
- if (State->IsLive(AliasReg) || (KillIndices[SuperReg] > DefIndices[AliasReg])) {
- DEBUG(errs() << "(alias " << TRI->getName(AliasReg) << " live)");
- found = true;
- break;
+ DEBUG(errs() << " [" << TRI->getName(NewSuperReg) << ':');
+ RenameMap.clear();
+
+ // For each referenced group register (which must be a SuperReg or
+ // a subregister of SuperReg), find the corresponding subregister
+ // of NewSuperReg and make sure it is free to be renamed.
+ for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
+ unsigned Reg = Regs[i];
+ unsigned NewReg = 0;
+ if (Reg == SuperReg) {
+ NewReg = NewSuperReg;
+ } else {
+ unsigned NewSubRegIdx = TRI->getSubRegIndex(SuperReg, Reg);
+ if (NewSubRegIdx != 0)
+ NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx);
+ }
+
+ DEBUG(errs() << " " << TRI->getName(NewReg));
+
+ // Check if Reg can be renamed to NewReg.
+ BitVector BV = RenameRegisterMap[Reg];
+ if (!BV.test(NewReg)) {
+ DEBUG(errs() << "(no rename)");
+ goto next_super_reg;
+ }
+
+ // If NewReg is dead and NewReg's most recent def is not before
+ // Regs's kill, it's safe to replace Reg with NewReg. We
+ // must also check all aliases of NewReg, because we can't define a
+ // register when any sub or super is already live.
+ if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) {
+ DEBUG(errs() << "(live)");
+ goto next_super_reg;
+ } else {
+ bool found = false;
+ for (const unsigned *Alias = TRI->getAliasSet(NewReg);
+ *Alias; ++Alias) {
+ unsigned AliasReg = *Alias;
+ if (State->IsLive(AliasReg) || (KillIndices[Reg] > DefIndices[AliasReg])) {
+ DEBUG(errs() << "(alias " << TRI->getName(AliasReg) << " live)");
+ found = true;
+ break;
+ }
}
+ if (found)
+ goto next_super_reg;
}
- if (found)
- continue;
+
+ // Record that 'Reg' can be renamed to 'NewReg'.
+ RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg));
}
- if (Reg != 0) {
- DEBUG(errs() << '\n');
- RenameOrder.erase(SuperRC);
- RenameOrder.insert(RenameOrderType::value_type(SuperRC, R));
- RenameMap.insert(std::pair<unsigned, unsigned>(SuperReg, Reg));
- return true;
- }
+ // If we fall-out here, then every register in the group can be
+ // renamed, as recorded in RenameMap.
+ RenameOrder.erase(SuperRC);
+ RenameOrder.insert(RenameOrderType::value_type(SuperRC, R));
+ DEBUG(errs() << "]\n");
+ return true;
+
+ next_super_reg:
+ DEBUG(errs() << ']');
} while (R != EndR);
DEBUG(errs() << '\n');
@@ -698,7 +696,6 @@
///
unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
std::vector<SUnit>& SUnits,
- CandidateMap& Candidates,
MachineBasicBlock::iterator& Begin,
MachineBasicBlock::iterator& End,
unsigned InsertPosIndex) {
@@ -711,16 +708,6 @@
// so just duck out immediately if the block is empty.
if (SUnits.empty()) return 0;
- // Manage saved state to enable multiple passes...
- if (AntiDepTrials > 1) {
- if (SavedState == NULL) {
- SavedState = new AggressiveAntiDepState(*State);
- } else {
- delete State;
- State = new AggressiveAntiDepState(*SavedState);
- }
- }
-
// For each regclass the next register to use for renaming.
RenameOrderType RenameOrder;
@@ -749,21 +736,14 @@
CriticalPathMI = CriticalPathSU->getInstr();
}
- // Even if there are no anti-dependencies we still need to go
- // through the instructions to update Def, Kills, etc.
#ifndef NDEBUG
- if (Candidates.empty()) {
- DEBUG(errs() << "\n===== No anti-dependency candidates\n");
- } else {
- DEBUG(errs() << "\n===== Attempting to break " << Candidates.size() <<
- " anti-dependencies\n");
- DEBUG(errs() << "Available regs:");
- for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) {
- if (!State->IsLive(Reg))
- DEBUG(errs() << " " << TRI->getName(Reg));
- }
- DEBUG(errs() << '\n');
+ DEBUG(errs() << "\n===== Aggressive anti-dependency breaking\n");
+ DEBUG(errs() << "Available regs:");
+ for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) {
+ if (!State->IsLive(Reg))
+ DEBUG(errs() << " " << TRI->getName(Reg));
}
+ DEBUG(errs() << '\n');
#endif
// Attempt to break anti-dependence edges. Walk the instructions
@@ -784,14 +764,11 @@
// Process the defs in MI...
PrescanInstruction(MI, Count, PassthruRegs);
- // The the dependence edges that represent anti- and output-
+ // The dependence edges that represent anti- and output-
// dependencies that are candidates for breaking.
std::vector<SDep*> Edges;
SUnit *PathSU = MISUnitMap[MI];
- AntiDepBreaker::CandidateMap::iterator
- citer = Candidates.find(PathSU);
- if (citer != Candidates.end())
- AntiDepEdges(PathSU, citer->second, Edges);
+ AntiDepEdges(PathSU, Edges);
// If MI is not on the critical path, then we don't rename
// registers in the CriticalPathSet.
@@ -847,12 +824,32 @@
// anti-dependency since those edges would prevent such
// units from being scheduled past each other
// regardless.
+ //
+ // Also, if there are dependencies on other SUnits with the
+ // same register as the anti-dependency, don't attempt to
+ // break it.
+ for (SUnit::pred_iterator P = PathSU->Preds.begin(),
+ PE = PathSU->Preds.end(); P != PE; ++P) {
+ if (P->getSUnit() == NextSU ?
+ (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) :
+ (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) {
+ AntiDepReg = 0;
+ break;
+ }
+ }
for (SUnit::pred_iterator P = PathSU->Preds.begin(),
PE = PathSU->Preds.end(); P != PE; ++P) {
- if ((P->getSUnit() == NextSU) && (P->getKind() != SDep::Anti)) {
+ if ((P->getSUnit() == NextSU) && (P->getKind() != SDep::Anti) &&
+ (P->getKind() != SDep::Output)) {
DEBUG(errs() << " (real dependency)\n");
AntiDepReg = 0;
break;
+ } else if ((P->getSUnit() != NextSU) &&
+ (P->getKind() == SDep::Data) &&
+ (P->getReg() == AntiDepReg)) {
+ DEBUG(errs() << " (other dependency)\n");
+ AntiDepReg = 0;
+ break;
}
}
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h Tue Nov 24 13:42:43 2009
@@ -27,12 +27,11 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallSet.h"
+#include <map>
namespace llvm {
/// Class AggressiveAntiDepState
- /// Contains all the state necessary for anti-dep breaking. We place
- /// into a separate class so be can conveniently save/restore it to
- /// enable multi-pass anti-dep breaking.
+ /// Contains all the state necessary for anti-dep breaking.
class AggressiveAntiDepState {
public:
/// RegisterReference - Information about a register reference
@@ -126,23 +125,11 @@
/// registers.
AggressiveAntiDepState *State;
- /// SavedState - The state for the start of an anti-dep
- /// region. Used to restore the state at the beginning of each
- /// pass
- AggressiveAntiDepState *SavedState;
-
public:
AggressiveAntiDepBreaker(MachineFunction& MFi,
TargetSubtarget::RegClassVector& CriticalPathRCs);
~AggressiveAntiDepBreaker();
- /// GetMaxTrials - As anti-dependencies are broken, additional
- /// dependencies may be exposed, so multiple passes are required.
- unsigned GetMaxTrials();
-
- /// NeedCandidates - Candidates required.
- bool NeedCandidates() { return true; }
-
/// Start - Initialize anti-dep breaking for a new basic block.
void StartBlock(MachineBasicBlock *BB);
@@ -150,7 +137,6 @@
/// of the ScheduleDAG and break them by renaming registers.
///
unsigned BreakAntiDependencies(std::vector<SUnit>& SUnits,
- CandidateMap& Candidates,
MachineBasicBlock::iterator& Begin,
MachineBasicBlock::iterator& End,
unsigned InsertPosIndex);
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/AntiDepBreaker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/AntiDepBreaker.h?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/AntiDepBreaker.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/AntiDepBreaker.h Tue Nov 24 13:42:43 2009
@@ -21,9 +21,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/ADT/SmallSet.h"
-#include "llvm/ADT/SmallVector.h"
-#include <map>
+#include <vector>
namespace llvm {
@@ -32,20 +30,8 @@
/// anti-dependencies.
class AntiDepBreaker {
public:
- typedef SmallSet<unsigned, 4> AntiDepRegSet;
- typedef SmallVector<unsigned, 4> AntiDepRegVector;
- typedef std::map<SUnit *, AntiDepRegVector> CandidateMap;
-
virtual ~AntiDepBreaker();
- /// GetMaxTrials - Return the maximum number of anti-dependence
- /// breaking attempts that will be made for a block.
- virtual unsigned GetMaxTrials() =0;
-
- /// NeedCandidates - Return true if the schedule must provide
- /// candidates with BreakAntiDependencies().
- virtual bool NeedCandidates() =0;
-
/// Start - Initialize anti-dep breaking for a new basic block.
virtual void StartBlock(MachineBasicBlock *BB) =0;
@@ -54,7 +40,6 @@
/// the number of anti-dependencies broken.
///
virtual unsigned BreakAntiDependencies(std::vector<SUnit>& SUnits,
- CandidateMap& Candidates,
MachineBasicBlock::iterator& Begin,
MachineBasicBlock::iterator& End,
unsigned InsertPosIndex) =0;
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp Tue Nov 24 13:42:43 2009
@@ -316,7 +316,6 @@
unsigned CriticalAntiDepBreaker::
BreakAntiDependencies(std::vector<SUnit>& SUnits,
- CandidateMap& Candidates,
MachineBasicBlock::iterator& Begin,
MachineBasicBlock::iterator& End,
unsigned InsertPosIndex) {
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h Tue Nov 24 13:42:43 2009
@@ -25,6 +25,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallSet.h"
+#include <map>
namespace llvm {
class CriticalAntiDepBreaker : public AntiDepBreaker {
@@ -64,13 +65,6 @@
CriticalAntiDepBreaker(MachineFunction& MFi);
~CriticalAntiDepBreaker();
- /// GetMaxTrials - Critical path anti-dependence breaking requires
- /// only a single pass
- unsigned GetMaxTrials() { return 1; }
-
- /// NeedCandidates - Candidates not needed.
- bool NeedCandidates() { return false; }
-
/// Start - Initialize anti-dep breaking for a new basic block.
void StartBlock(MachineBasicBlock *BB);
@@ -78,7 +72,6 @@
/// of the ScheduleDAG and break them by renaming registers.
///
unsigned BreakAntiDependencies(std::vector<SUnit>& SUnits,
- CandidateMap& Candidates,
MachineBasicBlock::iterator& Begin,
MachineBasicBlock::iterator& End,
unsigned InsertPosIndex);
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/LatencyPriorityQueue.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/LatencyPriorityQueue.cpp?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/LatencyPriorityQueue.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/LatencyPriorityQueue.cpp Tue Nov 24 13:42:43 2009
@@ -55,10 +55,6 @@
SUnit *OnlyAvailablePred = 0;
for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
I != E; ++I) {
- if (IgnoreAntiDep &&
- ((I->getKind() == SDep::Anti) || (I->getKind() == SDep::Output)))
- continue;
-
SUnit &Pred = *I->getSUnit();
if (!Pred.isScheduled) {
// We found an available, but not scheduled, predecessor. If it's the
@@ -78,10 +74,6 @@
unsigned NumNodesBlocking = 0;
for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
I != E; ++I) {
- if (IgnoreAntiDep &&
- ((I->getKind() == SDep::Anti) || (I->getKind() == SDep::Output)))
- continue;
-
if (getSingleUnscheduledPred(I->getSUnit()) == SU)
++NumNodesBlocking;
}
@@ -98,10 +90,6 @@
void LatencyPriorityQueue::ScheduledNode(SUnit *SU) {
for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
I != E; ++I) {
- if (IgnoreAntiDep &&
- ((I->getKind() == SDep::Anti) || (I->getKind() == SDep::Output)))
- continue;
-
AdjustPriorityOfUnscheduledPreds(I->getSUnit());
}
}
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/PostRASchedulerList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/PostRASchedulerList.cpp?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/PostRASchedulerList.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/PostRASchedulerList.cpp Tue Nov 24 13:42:43 2009
@@ -175,11 +175,10 @@
void FixupKills(MachineBasicBlock *MBB);
private:
- void ReleaseSucc(SUnit *SU, SDep *SuccEdge, bool IgnoreAntiDep);
- void ReleaseSuccessors(SUnit *SU, bool IgnoreAntiDep);
- void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle, bool IgnoreAntiDep);
- void ListScheduleTopDown(
- AntiDepBreaker::CandidateMap *AntiDepCandidates);
+ void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
+ void ReleaseSuccessors(SUnit *SU);
+ void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
+ void ListScheduleTopDown();
void StartBlockForKills(MachineBasicBlock *BB);
// ToggleKillFlag - Toggle a register operand kill flag. Other
@@ -322,50 +321,24 @@
BuildSchedGraph(AA);
if (AntiDepBreak != NULL) {
- AntiDepBreaker::CandidateMap AntiDepCandidates;
- const bool NeedCandidates = AntiDepBreak->NeedCandidates();
+ unsigned Broken =
+ AntiDepBreak->BreakAntiDependencies(SUnits, Begin, InsertPos,
+ InsertPosIndex);
- for (unsigned i = 0, Trials = AntiDepBreak->GetMaxTrials();
- i < Trials; ++i) {
- DEBUG(errs() << "\n********** Break Anti-Deps, Trial " <<
- i << " **********\n");
-
- // If candidates are required, then schedule forward ignoring
- // anti-dependencies to collect the candidate operands for
- // anti-dependence breaking. The candidates will be the def
- // operands for the anti-dependencies that if broken would allow
- // an improved schedule
- if (NeedCandidates) {
- DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su)
- SUnits[su].dumpAll(this));
-
- AntiDepCandidates.clear();
- AvailableQueue.initNodes(SUnits);
- ListScheduleTopDown(&AntiDepCandidates);
- AvailableQueue.releaseState();
- }
-
- unsigned Broken =
- AntiDepBreak->BreakAntiDependencies(SUnits, AntiDepCandidates,
- Begin, InsertPos, InsertPosIndex);
-
+ if (Broken != 0) {
// We made changes. Update the dependency graph.
// Theoretically we could update the graph in place:
// When a live range is changed to use a different register, remove
// the def's anti-dependence *and* output-dependence edges due to
// that register, and add new anti-dependence and output-dependence
// edges based on the next live range of the register.
- if ((Broken != 0) || NeedCandidates) {
- SUnits.clear();
- Sequence.clear();
- EntrySU = SUnit();
- ExitSU = SUnit();
- BuildSchedGraph(AA);
- }
-
+ SUnits.clear();
+ Sequence.clear();
+ EntrySU = SUnit();
+ ExitSU = SUnit();
+ BuildSchedGraph(AA);
+
NumFixedAnti += Broken;
- if (Broken == 0)
- break;
}
}
@@ -374,7 +347,7 @@
SUnits[su].dumpAll(this));
AvailableQueue.initNodes(SUnits);
- ListScheduleTopDown(NULL);
+ ListScheduleTopDown();
AvailableQueue.releaseState();
}
@@ -573,8 +546,7 @@
/// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it to
/// the PendingQueue if the count reaches zero. Also update its cycle bound.
-void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge,
- bool IgnoreAntiDep) {
+void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) {
SUnit *SuccSU = SuccEdge->getSUnit();
#ifndef NDEBUG
@@ -590,8 +562,7 @@
// Compute how many cycles it will be before this actually becomes
// available. This is the max of the start time of all predecessors plus
// their latencies.
- SuccSU->setDepthToAtLeast(SU->getDepth(IgnoreAntiDep) +
- SuccEdge->getLatency(), IgnoreAntiDep);
+ SuccSU->setDepthToAtLeast(SU->getDepth() + SuccEdge->getLatency());
// If all the node's predecessors are scheduled, this node is ready
// to be scheduled. Ignore the special ExitSU node.
@@ -600,40 +571,34 @@
}
/// ReleaseSuccessors - Call ReleaseSucc on each of SU's successors.
-void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU, bool IgnoreAntiDep) {
+void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU) {
for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
I != E; ++I) {
- if (IgnoreAntiDep &&
- ((I->getKind() == SDep::Anti) || (I->getKind() == SDep::Output)))
- continue;
- ReleaseSucc(SU, &*I, IgnoreAntiDep);
+ ReleaseSucc(SU, &*I);
}
}
/// ScheduleNodeTopDown - Add the node to the schedule. Decrement the pending
/// count of its successors. If a successor pending count is zero, add it to
/// the Available queue.
-void SchedulePostRATDList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle,
- bool IgnoreAntiDep) {
+void SchedulePostRATDList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
DEBUG(errs() << "*** Scheduling [" << CurCycle << "]: ");
DEBUG(SU->dump(this));
Sequence.push_back(SU);
- assert(CurCycle >= SU->getDepth(IgnoreAntiDep) &&
+ assert(CurCycle >= SU->getDepth() &&
"Node scheduled above its depth!");
- SU->setDepthToAtLeast(CurCycle, IgnoreAntiDep);
+ SU->setDepthToAtLeast(CurCycle);
- ReleaseSuccessors(SU, IgnoreAntiDep);
+ ReleaseSuccessors(SU);
SU->isScheduled = true;
AvailableQueue.ScheduledNode(SU);
}
/// ListScheduleTopDown - The main loop of list scheduling for top-down
/// schedulers.
-void SchedulePostRATDList::ListScheduleTopDown(
- AntiDepBreaker::CandidateMap *AntiDepCandidates) {
+void SchedulePostRATDList::ListScheduleTopDown() {
unsigned CurCycle = 0;
- const bool IgnoreAntiDep = (AntiDepCandidates != NULL);
// We're scheduling top-down but we're visiting the regions in
// bottom-up order, so we don't know the hazards at the start of a
@@ -641,33 +606,13 @@
// blocks are a single region).
HazardRec->Reset();
- // If ignoring anti-dependencies, the Schedule DAG still has Anti
- // dep edges, but we ignore them for scheduling purposes
- AvailableQueue.setIgnoreAntiDep(IgnoreAntiDep);
-
// Release any successors of the special Entry node.
- ReleaseSuccessors(&EntrySU, IgnoreAntiDep);
+ ReleaseSuccessors(&EntrySU);
- // Add all leaves to Available queue. If ignoring antideps we also
- // adjust the predecessor count for each node to not include antidep
- // edges.
+ // Add all leaves to Available queue.
for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
// It is available if it has no predecessors.
bool available = SUnits[i].Preds.empty();
- // If we are ignoring anti-dependencies then a node that has only
- // anti-dep predecessors is available.
- if (!available && IgnoreAntiDep) {
- available = true;
- for (SUnit::const_pred_iterator I = SUnits[i].Preds.begin(),
- E = SUnits[i].Preds.end(); I != E; ++I) {
- if ((I->getKind() != SDep::Anti) && (I->getKind() != SDep::Output)) {
- available = false;
- } else {
- SUnits[i].NumPredsLeft -= 1;
- }
- }
- }
-
if (available) {
AvailableQueue.push(&SUnits[i]);
SUnits[i].isAvailable = true;
@@ -687,21 +632,21 @@
// so, add them to the available queue.
unsigned MinDepth = ~0u;
for (unsigned i = 0, e = PendingQueue.size(); i != e; ++i) {
- if (PendingQueue[i]->getDepth(IgnoreAntiDep) <= CurCycle) {
+ if (PendingQueue[i]->getDepth() <= CurCycle) {
AvailableQueue.push(PendingQueue[i]);
PendingQueue[i]->isAvailable = true;
PendingQueue[i] = PendingQueue.back();
PendingQueue.pop_back();
--i; --e;
- } else if (PendingQueue[i]->getDepth(IgnoreAntiDep) < MinDepth)
- MinDepth = PendingQueue[i]->getDepth(IgnoreAntiDep);
+ } else if (PendingQueue[i]->getDepth() < MinDepth)
+ MinDepth = PendingQueue[i]->getDepth();
}
DEBUG(errs() << "\n*** Examining Available\n";
LatencyPriorityQueue q = AvailableQueue;
while (!q.empty()) {
SUnit *su = q.pop();
- errs() << "Height " << su->getHeight(IgnoreAntiDep) << ": ";
+ errs() << "Height " << su->getHeight() << ": ";
su->dump(this);
});
@@ -731,30 +676,8 @@
// If we found a node to schedule...
if (FoundSUnit) {
- // If we are ignoring anti-dependencies and the SUnit we are
- // scheduling has an antidep predecessor that has not been
- // scheduled, then we will need to break that antidep if we want
- // to get this schedule when not ignoring anti-dependencies.
- if (IgnoreAntiDep) {
- AntiDepBreaker::AntiDepRegVector AntiDepRegs;
- for (SUnit::const_pred_iterator I = FoundSUnit->Preds.begin(),
- E = FoundSUnit->Preds.end(); I != E; ++I) {
- if (((I->getKind() == SDep::Anti) ||
- (I->getKind() == SDep::Output)) &&
- !I->getSUnit()->isScheduled)
- AntiDepRegs.push_back(I->getReg());
- }
-
- if (AntiDepRegs.size() > 0) {
- DEBUG(errs() << "*** AntiDep Candidate: ");
- DEBUG(FoundSUnit->dump(this));
- AntiDepCandidates->insert(
- AntiDepBreaker::CandidateMap::value_type(FoundSUnit, AntiDepRegs));
- }
- }
-
// ... schedule the node...
- ScheduleNodeTopDown(FoundSUnit, CurCycle, IgnoreAntiDep);
+ ScheduleNodeTopDown(FoundSUnit, CurCycle);
HazardRec->EmitInstruction(FoundSUnit);
CycleHasInsts = true;
@@ -775,8 +698,7 @@
// just advance the current cycle and try again.
DEBUG(errs() << "*** Stall in cycle " << CurCycle << '\n');
HazardRec->AdvanceCycle();
- if (!IgnoreAntiDep)
- ++NumStalls;
+ ++NumStalls;
} else {
// Otherwise, we have no instructions to issue and we have instructions
// that will fault if we don't do this right. This is the case for
@@ -784,8 +706,7 @@
DEBUG(errs() << "*** Emitting noop in cycle " << CurCycle << '\n');
HazardRec->EmitNoop();
Sequence.push_back(0); // NULL here means noop
- if (!IgnoreAntiDep)
- ++NumNoops;
+ ++NumNoops;
}
++CurCycle;
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/ScheduleDAG.cpp?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/ScheduleDAG.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/ScheduleDAG.cpp Tue Nov 24 13:42:43 2009
@@ -183,8 +183,8 @@
/// setDepthToAtLeast - Update this node's successors to reflect the
/// fact that this node's depth just increased.
///
-void SUnit::setDepthToAtLeast(unsigned NewDepth, bool IgnoreAntiDep) {
- if (NewDepth <= getDepth(IgnoreAntiDep))
+void SUnit::setDepthToAtLeast(unsigned NewDepth) {
+ if (NewDepth <= getDepth())
return;
setDepthDirty();
Depth = NewDepth;
@@ -194,8 +194,8 @@
/// setHeightToAtLeast - Update this node's predecessors to reflect the
/// fact that this node's height just increased.
///
-void SUnit::setHeightToAtLeast(unsigned NewHeight, bool IgnoreAntiDep) {
- if (NewHeight <= getHeight(IgnoreAntiDep))
+void SUnit::setHeightToAtLeast(unsigned NewHeight) {
+ if (NewHeight <= getHeight())
return;
setHeightDirty();
Height = NewHeight;
@@ -204,7 +204,7 @@
/// ComputeDepth - Calculate the maximal path from the node to the exit.
///
-void SUnit::ComputeDepth(bool IgnoreAntiDep) {
+void SUnit::ComputeDepth() {
SmallVector<SUnit*, 8> WorkList;
WorkList.push_back(this);
do {
@@ -214,10 +214,6 @@
unsigned MaxPredDepth = 0;
for (SUnit::const_pred_iterator I = Cur->Preds.begin(),
E = Cur->Preds.end(); I != E; ++I) {
- if (IgnoreAntiDep &&
- ((I->getKind() == SDep::Anti) || (I->getKind() == SDep::Output)))
- continue;
-
SUnit *PredSU = I->getSUnit();
if (PredSU->isDepthCurrent)
MaxPredDepth = std::max(MaxPredDepth,
@@ -241,7 +237,7 @@
/// ComputeHeight - Calculate the maximal path from the node to the entry.
///
-void SUnit::ComputeHeight(bool IgnoreAntiDep) {
+void SUnit::ComputeHeight() {
SmallVector<SUnit*, 8> WorkList;
WorkList.push_back(this);
do {
@@ -251,10 +247,6 @@
unsigned MaxSuccHeight = 0;
for (SUnit::const_succ_iterator I = Cur->Succs.begin(),
E = Cur->Succs.end(); I != E; ++I) {
- if (IgnoreAntiDep &&
- ((I->getKind() == SDep::Anti) || (I->getKind() == SDep::Output)))
- continue;
-
SUnit *SuccSU = I->getSUnit();
if (SuccSU->isHeightCurrent)
MaxSuccHeight = std::max(MaxSuccHeight,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMScheduleV7.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMScheduleV7.td?rev=89794&r1=89793&r2=89794&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMScheduleV7.td (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMScheduleV7.td Tue Nov 24 13:42:43 2009
@@ -180,7 +180,7 @@
// Double-precision FP Unary
InstrItinData<IIC_fpUNA64 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<4, [FU_NPipe], 0>,
- InstrStage<4, [FU_NLSPipe]>]>,
+ InstrStage<4, [FU_NLSPipe]>], [4, 1]>,
//
// Single-precision FP Compare
InstrItinData<IIC_fpCMP32 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
@@ -189,17 +189,17 @@
// Double-precision FP Compare
InstrItinData<IIC_fpCMP64 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<4, [FU_NPipe], 0>,
- InstrStage<4, [FU_NLSPipe]>]>,
+ InstrStage<4, [FU_NLSPipe]>], [4, 1]>,
//
// Single to Double FP Convert
InstrItinData<IIC_fpCVTSD , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<7, [FU_NPipe], 0>,
- InstrStage<7, [FU_NLSPipe]>]>,
+ InstrStage<7, [FU_NLSPipe]>], [7, 1]>,
//
// Double to Single FP Convert
InstrItinData<IIC_fpCVTDS , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<5, [FU_NPipe], 0>,
- InstrStage<5, [FU_NLSPipe]>]>,
+ InstrStage<5, [FU_NLSPipe]>], [5, 1]>,
//
// Single-Precision FP to Integer Convert
InstrItinData<IIC_fpCVTSI , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
@@ -208,7 +208,7 @@
// Double-Precision FP to Integer Convert
InstrItinData<IIC_fpCVTDI , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<8, [FU_NPipe], 0>,
- InstrStage<8, [FU_NLSPipe]>]>,
+ InstrStage<8, [FU_NLSPipe]>], [8, 1]>,
//
// Integer to Single-Precision FP Convert
InstrItinData<IIC_fpCVTIS , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
@@ -217,7 +217,7 @@
// Integer to Double-Precision FP Convert
InstrItinData<IIC_fpCVTID , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<8, [FU_NPipe], 0>,
- InstrStage<8, [FU_NLSPipe]>]>,
+ InstrStage<8, [FU_NLSPipe]>], [8, 1]>,
//
// Single-precision FP ALU
InstrItinData<IIC_fpALU32 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
@@ -226,7 +226,7 @@
// Double-precision FP ALU
InstrItinData<IIC_fpALU64 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<9, [FU_NPipe], 0>,
- InstrStage<9, [FU_NLSPipe]>]>,
+ InstrStage<9, [FU_NLSPipe]>], [9, 1, 1]>,
//
// Single-precision FP Multiply
InstrItinData<IIC_fpMUL32 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
@@ -235,7 +235,7 @@
// Double-precision FP Multiply
InstrItinData<IIC_fpMUL64 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<11, [FU_NPipe], 0>,
- InstrStage<11, [FU_NLSPipe]>]>,
+ InstrStage<11, [FU_NLSPipe]>], [11, 1, 1]>,
//
// Single-precision FP MAC
InstrItinData<IIC_fpMAC32 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
@@ -244,27 +244,27 @@
// Double-precision FP MAC
InstrItinData<IIC_fpMAC64 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<19, [FU_NPipe], 0>,
- InstrStage<19, [FU_NLSPipe]>]>,
+ InstrStage<19, [FU_NLSPipe]>], [19, 2, 1, 1]>,
//
// Single-precision FP DIV
InstrItinData<IIC_fpDIV32 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<20, [FU_NPipe], 0>,
- InstrStage<20, [FU_NLSPipe]>]>,
+ InstrStage<20, [FU_NLSPipe]>], [20, 1, 1]>,
//
// Double-precision FP DIV
InstrItinData<IIC_fpDIV64 , [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<29, [FU_NPipe], 0>,
- InstrStage<29, [FU_NLSPipe]>]>,
+ InstrStage<29, [FU_NLSPipe]>], [29, 1, 1]>,
//
// Single-precision FP SQRT
InstrItinData<IIC_fpSQRT32, [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<19, [FU_NPipe], 0>,
- InstrStage<19, [FU_NLSPipe]>]>,
+ InstrStage<19, [FU_NLSPipe]>], [19, 1]>,
//
// Double-precision FP SQRT
InstrItinData<IIC_fpSQRT64, [InstrStage<1, [FU_Pipe0, FU_Pipe1]>,
InstrStage<29, [FU_NPipe], 0>,
- InstrStage<29, [FU_NLSPipe]>]>,
+ InstrStage<29, [FU_NLSPipe]>], [29, 1]>,
//
// Single-precision FP Load
// use FU_Issue to enforce the 1 load/store per cycle limit
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