[llvm-branch-commits] [llvm-branch] r89703 - in /llvm/branches/Apple/Zoidberg: lib/Target/ARM/ARMInstrVFP.td lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll test/CodeGen/ARM/fpconsts.ll test/CodeGen/Thumb2/cross-rc-coalescing-2.ll

Jim Grosbach grosbach at apple.com
Mon Nov 23 13:42:31 PST 2009


Author: grosbach
Date: Mon Nov 23 15:42:31 2009
New Revision: 89703

URL: http://llvm.org/viewvc/llvm-project?rev=89703&view=rev
Log:
merge 89700

Modified:
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrVFP.td
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
    llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll
    llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/fpconsts.ll
    llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrVFP.td?rev=89703&r1=89702&r2=89703&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrVFP.td Mon Nov 23 15:42:31 2009
@@ -437,7 +437,7 @@
 let isReMaterializable = 1 in {
 def FCONSTD : VFPAI<(outs DPR:$dst), (ins vfp_f64imm:$imm),
                     VFPMiscFrm, IIC_VMOVImm,
-                    "fconstd", "\t$dst, $imm",
+                    "vmov.f64", "\t$dst, $imm",
                     [(set DPR:$dst, vfp_f64imm:$imm)]>, Requires<[HasVFP3]> {
   let Inst{27-23} = 0b11101;
   let Inst{21-20} = 0b11;
@@ -448,7 +448,7 @@
 
 def FCONSTS : VFPAI<(outs SPR:$dst), (ins vfp_f32imm:$imm),
                     VFPMiscFrm, IIC_VMOVImm,
-                    "fconsts", "\t$dst, $imm",
+                    "vmov.f32", "\t$dst, $imm",
                     [(set SPR:$dst, vfp_f32imm:$imm)]>, Requires<[HasVFP3]> {
   let Inst{27-23} = 0b11101;
   let Inst{21-20} = 0b11;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=89703&r1=89702&r2=89703&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Nov 23 15:42:31 2009
@@ -998,7 +998,7 @@
 
 void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum) {
   const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
-  O << '#' << ARM::getVFPf32Imm(FP->getValueAPF());
+  O << '#' << FP->getValueAPF().convertToFloat();
   if (VerboseAsm) {
     O.PadToColumn(MAI->getCommentColumn());
     O << MAI->getCommentString() << ' ';
@@ -1008,7 +1008,7 @@
 
 void ARMAsmPrinter::printVFPf64ImmOperand(const MachineInstr *MI, int OpNum) {
   const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
-  O << '#' << ARM::getVFPf64Imm(FP->getValueAPF());
+  O << '#' << FP->getValueAPF().convertToDouble();
   if (VerboseAsm) {
     O.PadToColumn(MAI->getCommentColumn());
     O << MAI->getCommentString() << ' ';

Modified: llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll?rev=89703&r1=89702&r2=89703&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll (original)
+++ llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll Mon Nov 23 15:42:31 2009
@@ -13,7 +13,7 @@
   %4 = fadd float 0.000000e+00, %3                ; <float> [#uses=1]
   %5 = fsub float 1.000000e+00, %4                ; <float> [#uses=1]
 ; CHECK: foo:
-; CHECK: fconsts s{{[0-9]+}}, #112
+; CHECK: vmov.f32 s{{[0-9]+}}, #1.000000e+00
   %6 = fsub float 1.000000e+00, undef             ; <float> [#uses=2]
   %7 = fsub float %2, undef                       ; <float> [#uses=1]
   %8 = fsub float 0.000000e+00, undef             ; <float> [#uses=3]

Modified: llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/fpconsts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/fpconsts.ll?rev=89703&r1=89702&r2=89703&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/fpconsts.ll (original)
+++ llvm/branches/Apple/Zoidberg/test/CodeGen/ARM/fpconsts.ll Mon Nov 23 15:42:31 2009
@@ -3,7 +3,7 @@
 define arm_apcscc float @t1(float %x) nounwind readnone optsize {
 entry:
 ; CHECK: t1:
-; CHECK: fconsts s1, #16
+; CHECK: vmov.f32 s1, #4.000000e+00
   %0 = fadd float %x, 4.000000e+00
   ret float %0
 }
@@ -11,7 +11,7 @@
 define arm_apcscc double @t2(double %x) nounwind readnone optsize {
 entry:
 ; CHECK: t2:
-; CHECK: fconstd d1, #8
+; CHECK: vmov.f64 d1, #3.000000e+00
   %0 = fadd double %x, 3.000000e+00
   ret double %0
 }
@@ -19,7 +19,7 @@
 define arm_apcscc double @t3(double %x) nounwind readnone optsize {
 entry:
 ; CHECK: t3:
-; CHECK: fconstd d1, #170
+; CHECK: vmov.f64 d1, #-1.300000e+01
   %0 = fmul double %x, -1.300000e+01
   ret double %0
 }
@@ -27,7 +27,7 @@
 define arm_apcscc float @t4(float %x) nounwind readnone optsize {
 entry:
 ; CHECK: t4:
-; CHECK: fconsts s1, #184
+; CHECK: vmov.f32 s1, #-2.400000e+01
   %0 = fmul float %x, -2.400000e+01
   ret float %0
 }

Modified: llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll?rev=89703&r1=89702&r2=89703&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll (original)
+++ llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll Mon Nov 23 15:42:31 2009
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 4
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 5
 
 define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
 entry:





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