[llvm-branch-commits] [llvm-branch] r89390 - in /llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG: LegalizeTypes.h LegalizeVectorTypes.cpp

[Bill Wendling]

Author: void
Date: Thu Nov 19 15:35:43 2009
New Revision: 89390

URL: http://llvm.org/viewvc/llvm-project?rev=89390&view=rev
Log:
Merge in r84279.

Modified:
    llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=89390&r1=89389&r2=89390&view=diff

==============================================================================
--- llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Nov 19 15:35:43 2009
@@ -623,6 +623,7 @@
   SDValue WidenVecOp_BIT_CONVERT(SDNode *N);
   SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
   SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
+  SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
   SDValue WidenVecOp_STORE(SDNode* N);
 
   SDValue WidenVecOp_Convert(SDNode *N);

Modified: llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=89390&r1=89389&r2=89390&view=diff

==============================================================================
--- llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/branches/Apple/Fry/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Thu Nov 19 15:35:43 2009
@@ -1812,6 +1812,7 @@
 
   case ISD::BIT_CONVERT:        Res = WidenVecOp_BIT_CONVERT(N); break;
   case ISD::CONCAT_VECTORS:     Res = WidenVecOp_CONCAT_VECTORS(N); break;
+  case ISD::EXTRACT_SUBVECTOR:  Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
   case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
   case ISD::STORE:              Res = WidenVecOp_STORE(N); break;
 
@@ -1922,6 +1923,12 @@
   return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
 }
 
+SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
+  SDValue InOp = GetWidenedVector(N->getOperand(0));
+  return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
+                     N->getValueType(0), InOp, N->getOperand(1));
+}
+
 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
   SDValue InOp = GetWidenedVector(N->getOperand(0));
   MVT EltVT = InOp.getValueType().getVectorElementType();