[llvm-branch-commits] [llvm-branch] r89020 - in /llvm/branches/Apple/Leela: lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/2009-11-16-MachineLICM.ll
Evan Cheng
evan.cheng at apple.com
Mon Nov 16 17:01:46 PST 2009
Author: evancheng
Date: Mon Nov 16 19:01:46 2009
New Revision: 89020
URL: http://llvm.org/viewvc/llvm-project?rev=89020&view=rev
Log:
Merge 89011 and 89019.
Added:
llvm/branches/Apple/Leela/test/CodeGen/X86/2009-11-16-MachineLICM.ll
Modified:
llvm/branches/Apple/Leela/lib/Target/X86/X86Instr64bit.td
llvm/branches/Apple/Leela/lib/Target/X86/X86InstrInfo.cpp
llvm/branches/Apple/Leela/lib/Target/X86/X86InstrSSE.td
Modified: llvm/branches/Apple/Leela/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/X86/X86Instr64bit.td?rev=89020&r1=89019&r2=89020&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/branches/Apple/Leela/lib/Target/X86/X86Instr64bit.td Mon Nov 16 19:01:46 2009
@@ -309,7 +309,7 @@
[(set GR64:$dst, i64immSExt32:$src)]>;
}
-let canFoldAsLoad = 1 in
+let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def MOV64rm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
"mov{q}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (load addr:$src))]>;
Modified: llvm/branches/Apple/Leela/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/X86/X86InstrInfo.cpp?rev=89020&r1=89019&r2=89020&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/X86/X86InstrInfo.cpp Mon Nov 16 19:01:46 2009
@@ -795,10 +795,13 @@
case X86::MOVSDrm:
case X86::MOVAPSrm:
case X86::MOVUPSrm:
+ case X86::MOVUPSrm_Int:
case X86::MOVAPDrm:
case X86::MOVDQArm:
case X86::MMX_MOVD64rm:
- case X86::MMX_MOVQ64rm: {
+ case X86::MMX_MOVQ64rm:
+ case X86::FsMOVAPSrm:
+ case X86::FsMOVAPDrm: {
// Loads from constant pools are trivially rematerializable.
if (MI->getOperand(1).isReg() &&
MI->getOperand(2).isImm() &&
Modified: llvm/branches/Apple/Leela/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/X86/X86InstrSSE.td?rev=89020&r1=89019&r2=89020&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/branches/Apple/Leela/lib/Target/X86/X86InstrSSE.td Mon Nov 16 19:01:46 2009
@@ -497,7 +497,7 @@
// Alias instruction to load FR32 from f128mem using movaps. Upper bits are
// disregarded.
-let canFoldAsLoad = 1 in
+let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src),
"movaps\t{$src, $dst|$dst, $src}",
[(set FR32:$dst, (alignedloadfsf32 addr:$src))]>;
@@ -715,7 +715,7 @@
[(store (v4f32 VR128:$src), addr:$dst)]>;
// Intrinsic forms of MOVUPS load and store
-let canFoldAsLoad = 1 in
+let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
"movups\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>;
@@ -1256,7 +1256,7 @@
// Alias instruction to load FR64 from f128mem using movapd. Upper bits are
// disregarded.
-let canFoldAsLoad = 1 in
+let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src),
"movapd\t{$src, $dst|$dst, $src}",
[(set FR64:$dst, (alignedloadfsf64 addr:$src))]>;
Added: llvm/branches/Apple/Leela/test/CodeGen/X86/2009-11-16-MachineLICM.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/X86/2009-11-16-MachineLICM.ll?rev=89020&view=auto
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/X86/2009-11-16-MachineLICM.ll (added)
+++ llvm/branches/Apple/Leela/test/CodeGen/X86/2009-11-16-MachineLICM.ll Mon Nov 16 19:01:46 2009
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; rdar://7395200
+
+ at g = common global [4 x float] zeroinitializer, align 16 ; <[4 x float]*> [#uses=4]
+
+define void @foo(i32 %n, float* nocapture %x) nounwind ssp {
+entry:
+; CHECK: foo:
+ %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+; CHECK: movq _g at GOTPCREL(%rip), %rcx
+ %tmp = zext i32 %n to i64 ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+; CHECK: LBB1_2:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=2]
+ %tmp9 = shl i64 %indvar, 2 ; <i64> [#uses=4]
+ %tmp1016 = or i64 %tmp9, 1 ; <i64> [#uses=1]
+ %scevgep = getelementptr float* %x, i64 %tmp1016 ; <float*> [#uses=1]
+ %tmp1117 = or i64 %tmp9, 2 ; <i64> [#uses=1]
+ %scevgep12 = getelementptr float* %x, i64 %tmp1117 ; <float*> [#uses=1]
+ %tmp1318 = or i64 %tmp9, 3 ; <i64> [#uses=1]
+ %scevgep14 = getelementptr float* %x, i64 %tmp1318 ; <float*> [#uses=1]
+ %x_addr.03 = getelementptr float* %x, i64 %tmp9 ; <float*> [#uses=1]
+ %1 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 0), align 16 ; <float> [#uses=1]
+ store float %1, float* %x_addr.03, align 4
+ %2 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 1), align 4 ; <float> [#uses=1]
+ store float %2, float* %scevgep, align 4
+ %3 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 2), align 8 ; <float> [#uses=1]
+ store float %3, float* %scevgep12, align 4
+ %4 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 3), align 4 ; <float> [#uses=1]
+ store float %4, float* %scevgep14, align 4
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, %tmp ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
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