[llvm-branch-commits] [llvm-branch] r88822 - in /llvm/branches/Apple/Leela-M1: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/VirtRegRewriter.cpp test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll utils/TableGen/RegisterInfoEmitter.cpp

[Bill Wendling]

Author: void
Date: Sat Nov 14 16:52:03 2009
New Revision: 88822

URL: http://llvm.org/viewvc/llvm-project?rev=88822&view=rev
Log:
$ svn merge -c 88753 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r88753 into '.':
A    test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
U    include/llvm/Target/TargetRegisterInfo.h
U    utils/TableGen/RegisterInfoEmitter.cpp
U    lib/CodeGen/VirtRegRewriter.cpp


Added:
    llvm/branches/Apple/Leela-M1/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
      - copied unchanged from r88753, llvm/trunk/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
Modified:
    llvm/branches/Apple/Leela-M1/include/llvm/Target/TargetRegisterInfo.h
    llvm/branches/Apple/Leela-M1/lib/CodeGen/VirtRegRewriter.cpp
    llvm/branches/Apple/Leela-M1/utils/TableGen/RegisterInfoEmitter.cpp

Modified: llvm/branches/Apple/Leela-M1/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela-M1/include/llvm/Target/TargetRegisterInfo.h?rev=88822&r1=88821&r2=88822&view=diff

==============================================================================
--- llvm/branches/Apple/Leela-M1/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/branches/Apple/Leela-M1/include/llvm/Target/TargetRegisterInfo.h Sat Nov 14 16:52:03 2009
@@ -463,6 +463,11 @@
   /// exist.
   virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0;
 
+  /// getSubRegIndex - For a given register pair, return the sub-register index
+  /// if they are second register is a sub-register of the second. Return zero
+  /// otherwise.
+  virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const = 0;
+
   /// getMatchingSuperReg - Return a super-register of the specified register
   /// Reg so its sub-register of index SubIdx is Reg.
   unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,

Modified: llvm/branches/Apple/Leela-M1/lib/CodeGen/VirtRegRewriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela-M1/lib/CodeGen/VirtRegRewriter.cpp?rev=88822&r1=88821&r2=88822&view=diff

==============================================================================
--- llvm/branches/Apple/Leela-M1/lib/CodeGen/VirtRegRewriter.cpp (original)
+++ llvm/branches/Apple/Leela-M1/lib/CodeGen/VirtRegRewriter.cpp Sat Nov 14 16:52:03 2009
@@ -816,11 +816,8 @@
                "A reuse cannot be a virtual register");
         if (PRRU != RealPhysRegUsed) {
           // What was the sub-register index?
-          unsigned SubReg;
-          for (SubIdx = 1; (SubReg = TRI->getSubReg(PRRU, SubIdx)); SubIdx++)
-            if (SubReg == RealPhysRegUsed)
-              break;
-          assert(SubReg == RealPhysRegUsed &&
+          SubIdx = TRI->getSubRegIndex(PRRU, RealPhysRegUsed);
+          assert(SubIdx &&
                  "Operand physreg is not a sub-register of PhysRegUsed");
         }
 

Modified: llvm/branches/Apple/Leela-M1/utils/TableGen/RegisterInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela-M1/utils/TableGen/RegisterInfoEmitter.cpp?rev=88822&r1=88821&r2=88822&view=diff

==============================================================================
--- llvm/branches/Apple/Leela-M1/utils/TableGen/RegisterInfoEmitter.cpp (original)
+++ llvm/branches/Apple/Leela-M1/utils/TableGen/RegisterInfoEmitter.cpp Sat Nov 14 16:52:03 2009
@@ -66,6 +66,7 @@
      << "  virtual bool needsStackRealignment(const MachineFunction &) const\n"
      << "     { return false; }\n"
      << "  unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
+     << "  unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n"
      << "};\n\n";
 
   const std::vector<CodeGenRegisterClass> &RegisterClasses =
@@ -831,6 +832,23 @@
   OS << "  };\n";
   OS << "  return 0;\n";
   OS << "}\n\n";
+
+  OS << "unsigned " << ClassName 
+     << "::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {\n"
+     << "  switch (RegNo) {\n"
+     << "  default:\n    return 0;\n";
+  for (std::map<Record*, std::vector<std::pair<int, Record*> > >::iterator 
+        I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) {
+    OS << "  case " << getQualifiedName(I->first) << ":\n";
+    for (unsigned i = 0, e = I->second.size(); i != e; ++i)
+      OS << "    if (SubRegNo == "
+         << getQualifiedName((I->second)[i].second)
+         << ")  return " << (I->second)[i].first << ";\n";
+    OS << "    return 0;\n";
+  }
+  OS << "  };\n";
+  OS << "  return 0;\n";
+  OS << "}\n\n";
   
   // Emit the constructor of the class...
   OS << ClassName << "::" << ClassName