[llvm-branch-commits] [llvm-branch] r88736 - in /llvm/branches/Apple/Leela: lib/Target/ARM/ARMLoadStoreOptimizer.cpp test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
Evan Cheng
evan.cheng at apple.com
Fri Nov 13 17:56:23 PST 2009
Author: evancheng
Date: Fri Nov 13 19:56:23 2009
New Revision: 88736
URL: http://llvm.org/viewvc/llvm-project?rev=88736&view=rev
Log:
Merge 88734.
Added:
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
Modified:
llvm/branches/Apple/Leela/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=88736&r1=88735&r2=88736&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Nov 13 19:56:23 2009
@@ -866,6 +866,13 @@
BaseReg, BaseKill, BaseUndef, OffReg, OffKill, OffUndef,
Pred, PredReg, TII, isT2);
} else {
+ if (OddReg == EvenReg && EvenDeadKill) {
+ // If the two source operands are the same, the kill marker is probably
+ // on the first one. e.g.
+ // t2STRDi8 %R5<kill>, %R5, %R9<kill>, 0, 14, %reg0
+ EvenDeadKill = false;
+ OddDeadKill = true;
+ }
InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc,
EvenReg, EvenDeadKill, EvenUndef,
BaseReg, false, BaseUndef, OffReg, false, OffUndef,
Added: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll?rev=88736&view=auto
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll (added)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll Fri Nov 13 19:56:23 2009
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
+; rdar://7394794
+
+define arm_apcscc void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
+entry:
+ %..i = select i1 false, i64 0, i64 0 ; <i64> [#uses=1]
+ br i1 undef, label %bb11.i, label %bb6.i
+
+bb6.i: ; preds = %entry
+ %0 = lshr i64 %h1, 0 ; <i64> [#uses=1]
+ store i64 %0, i64* %hv, align 4
+ %1 = lshr i64 %l1, 0 ; <i64> [#uses=1]
+ %2 = or i64 0, %1 ; <i64> [#uses=1]
+ store i64 %2, i64* %lv, align 4
+ br label %bb11.i
+
+bb11.i: ; preds = %bb6.i, %entry
+ store i64 %..i, i64* %lv, align 4
+ ret void
+}
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