[llvm-branch-commits] [llvm-branch] r86100 - in /llvm/branches/Apple/Leela/lib/CodeGen: LLVMTargetMachine.cpp MachineLICM.cpp

[Bill Wendling]

Author: void
Date: Wed Nov  4 19:26:46 2009
New Revision: 86100

URL: http://llvm.org/viewvc/llvm-project?rev=86100&view=rev
Log:
$ svn merge -c 86085 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r86085 into '.':
U    lib/CodeGen/MachineLICM.cpp
$ svn merge -c 86092 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r86092 into '.':
U    lib/CodeGen/LLVMTargetMachine.cpp


Modified:
    llvm/branches/Apple/Leela/lib/CodeGen/LLVMTargetMachine.cpp
    llvm/branches/Apple/Leela/lib/CodeGen/MachineLICM.cpp

Modified: llvm/branches/Apple/Leela/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/CodeGen/LLVMTargetMachine.cpp?rev=86100&r1=86099&r2=86100&view=diff

==============================================================================
--- llvm/branches/Apple/Leela/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/branches/Apple/Leela/lib/CodeGen/LLVMTargetMachine.cpp Wed Nov  4 19:26:46 2009
@@ -342,13 +342,13 @@
   PM.add(createDebugLabelFoldingPass());
   printAndVerify(PM, "After DebugLabelFolding");
 
-  if (addPreEmitPass(PM, OptLevel))
-    printAndVerify(PM, "After PreEmit passes");
-
   if (OptLevel != CodeGenOpt::None && !DisableCodePlace) {
     PM.add(createCodePlacementOptPass());
     printAndVerify(PM, "After CodePlacementOpt");
   }
 
+  if (addPreEmitPass(PM, OptLevel))
+    printAndVerify(PM, "After PreEmit passes");
+
   return false;
 }

Modified: llvm/branches/Apple/Leela/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/CodeGen/MachineLICM.cpp?rev=86100&r1=86099&r2=86100&view=diff

==============================================================================
--- llvm/branches/Apple/Leela/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/branches/Apple/Leela/lib/CodeGen/MachineLICM.cpp Wed Nov  4 19:26:46 2009
@@ -111,6 +111,13 @@
     /// be hoistable.
     MachineInstr *ExtractHoistableLoad(MachineInstr *MI);
 
+    /// EliminateCSE - Given a LICM'ed instruction, look for an instruction on
+    /// the preheader that compute the same value. If it's found, do a RAU on
+    /// with the definition of the existing instruction rather than hoisting
+    /// the instruction to the preheader.
+    bool EliminateCSE(MachineInstr *MI,
+           DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator &CI);
+
     /// Hoist - When an instruction is found to only use loop invariant operands
     /// that is safe to hoist, this instruction is called to do the dirty work.
     ///
@@ -349,37 +356,6 @@
   return true;
 }
 
-static const MachineInstr *LookForDuplicate(const MachineInstr *MI,
-                                      std::vector<const MachineInstr*> &PrevMIs,
-                                      MachineRegisterInfo *RegInfo) {
-  unsigned NumOps = MI->getNumOperands();
-  for (unsigned i = 0, e = PrevMIs.size(); i != e; ++i) {
-    const MachineInstr *PrevMI = PrevMIs[i];
-    unsigned NumOps2 = PrevMI->getNumOperands();
-    if (NumOps != NumOps2)
-      continue;
-    bool IsSame = true;
-    for (unsigned j = 0; j != NumOps; ++j) {
-      const MachineOperand &MO = MI->getOperand(j);
-      if (MO.isReg() && MO.isDef()) {
-        if (RegInfo->getRegClass(MO.getReg()) !=
-            RegInfo->getRegClass(PrevMI->getOperand(j).getReg())) {
-          IsSame = false;
-          break;
-        }
-        continue;
-      }
-      if (!MO.isIdenticalTo(PrevMI->getOperand(j))) {
-        IsSame = false;
-        break;
-      }
-    }
-    if (IsSame)
-      return PrevMI;
-  }
-  return 0;
-}
-
 MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) {
   // If not, we may be able to unfold a load and hoist that.
   // First test whether the instruction is loading from an amenable
@@ -456,6 +432,55 @@
   }
 }
 
+static const MachineInstr *LookForDuplicate(const MachineInstr *MI,
+                                      std::vector<const MachineInstr*> &PrevMIs,
+                                      MachineRegisterInfo *RegInfo) {
+  unsigned NumOps = MI->getNumOperands();
+  for (unsigned i = 0, e = PrevMIs.size(); i != e; ++i) {
+    const MachineInstr *PrevMI = PrevMIs[i];
+    unsigned NumOps2 = PrevMI->getNumOperands();
+    if (NumOps != NumOps2)
+      continue;
+    bool IsSame = true;
+    for (unsigned j = 0; j != NumOps; ++j) {
+      const MachineOperand &MO = MI->getOperand(j);
+      if (MO.isReg() && MO.isDef()) {
+        if (RegInfo->getRegClass(MO.getReg()) !=
+            RegInfo->getRegClass(PrevMI->getOperand(j).getReg())) {
+          IsSame = false;
+          break;
+        }
+        continue;
+      }
+      if (!MO.isIdenticalTo(PrevMI->getOperand(j))) {
+        IsSame = false;
+        break;
+      }
+    }
+    if (IsSame)
+      return PrevMI;
+  }
+  return 0;
+}
+
+bool MachineLICM::EliminateCSE(MachineInstr *MI,
+          DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator &CI) {
+  if (CI != CSEMap.end()) {
+    if (const MachineInstr *Dup = LookForDuplicate(MI, CI->second, RegInfo)) {
+      DEBUG(errs() << "CSEing " << *MI << " with " << *Dup);
+      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+        const MachineOperand &MO = MI->getOperand(i);
+        if (MO.isReg() && MO.isDef())
+          RegInfo->replaceRegWith(MO.getReg(), Dup->getOperand(i).getReg());
+      }
+      MI->eraseFromParent();
+      ++NumCSEed;
+      return true;
+    }
+  }
+  return false;
+}
+
 /// Hoist - When an instruction is found to use only loop invariant operands
 /// that are safe to hoist, this instruction is called to do the dirty work.
 ///
@@ -488,24 +513,8 @@
   unsigned Opcode = MI->getOpcode();
   DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator
     CI = CSEMap.find(Opcode);
-  bool DoneCSE = false;
-  if (CI != CSEMap.end()) {
-    const MachineInstr *Dup = LookForDuplicate(MI, CI->second, RegInfo);
-    if (Dup) {
-      DEBUG(errs() << "CSEing " << *MI << " with " << *Dup);
-      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-        const MachineOperand &MO = MI->getOperand(i);
-        if (MO.isReg() && MO.isDef())
-          RegInfo->replaceRegWith(MO.getReg(), Dup->getOperand(i).getReg());
-      }
-      MI->eraseFromParent();
-      DoneCSE = true;
-      ++NumCSEed;
-    }
-  }
-
-  // Otherwise, splice the instruction to the preheader.
-  if (!DoneCSE) {
+  if (!EliminateCSE(MI, CI)) {
+    // Otherwise, splice the instruction to the preheader.
     CurPreheader->splice(CurPreheader->getFirstTerminator(),MI->getParent(),MI);
 
     // Add to the CSE map.