[llvm-branch-commits] [cfe-branch] r73445 - in /cfe/branches/Apple/Dib: lib/CodeGen/CGCall.cpp test/CodeGen/x86_64-arguments.c

[Daniel Dunbar]

Author: ddunbar
Date: Mon Jun 15 18:43:04 2009
New Revision: 73445

URL: http://llvm.org/viewvc/llvm-project?rev=73445&view=rev
Log:
Merge in 72932:

------------------------------------------------------------------------
r72932 | ddunbar | 2009-06-05 00:58:54 -0700 (Fri, 05 Jun 2009) | 7 lines

ABI handling: Fix nasty thinko where IRgen could generate an out-of-bounds read
when generating a coercion for ABI handling purposes.
 - This may only manifest itself when building at -O0, but the practical effect
   is that other arguments may get clobbered.

 - <rdar://problem/6930451> [irgen] ABI coercion clobbers other arguments

------------------------------------------------------------------------

Modified:
    cfe/branches/Apple/Dib/lib/CodeGen/CGCall.cpp
    cfe/branches/Apple/Dib/test/CodeGen/x86_64-arguments.c

Modified: cfe/branches/Apple/Dib/lib/CodeGen/CGCall.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/Dib/lib/CodeGen/CGCall.cpp?rev=73445&r1=73444&r2=73445&view=diff

==============================================================================
--- cfe/branches/Apple/Dib/lib/CodeGen/CGCall.cpp (original)
+++ cfe/branches/Apple/Dib/lib/CodeGen/CGCall.cpp Mon Jun 15 18:43:04 2009
@@ -1643,14 +1643,7 @@
   uint64_t DstSize = CGF.CGM.getTargetData().getTypePaddedSize(DstTy);
 
   // If store is legal, just bitcast the src pointer.
-  if (SrcSize >= DstSize) {
-    // Generally SrcSize is never greater than DstSize, since this
-    // means we are losing bits. However, this can happen in cases
-    // where the structure has additional padding, for example due to
-    // a user specified alignment.
-    //
-    // FIXME: Assert that we aren't truncating non-padding bits when
-    // have access to that information.
+  if (SrcSize <= DstSize) {
     llvm::Value *Casted =
       CGF.Builder.CreateBitCast(DstPtr, llvm::PointerType::getUnqual(SrcTy));
     // FIXME: Use better alignment / avoid requiring aligned store.
@@ -1658,6 +1651,13 @@
   } else {
     // Otherwise do coercion through memory. This is stupid, but
     // simple.
+
+    // Generally SrcSize is never greater than DstSize, since this means we are
+    // losing bits. However, this can happen in cases where the structure has
+    // additional padding, for example due to a user specified alignment.
+    //
+    // FIXME: Assert that we aren't truncating non-padding bits when have access
+    // to that information.
     llvm::Value *Tmp = CGF.CreateTempAlloca(SrcTy);
     CGF.Builder.CreateStore(Src, Tmp);
     llvm::Value *Casted = 

Modified: cfe/branches/Apple/Dib/test/CodeGen/x86_64-arguments.c
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/Dib/test/CodeGen/x86_64-arguments.c?rev=73445&r1=73444&r2=73445&view=diff

==============================================================================
--- cfe/branches/Apple/Dib/test/CodeGen/x86_64-arguments.c (original)
+++ cfe/branches/Apple/Dib/test/CodeGen/x86_64-arguments.c Mon Jun 15 18:43:04 2009
@@ -82,4 +82,10 @@
 void f17(float a, float b, float c, float d, float e, float f, float g, float h,
          long double X) {}
 
+// Check for valid coercion.
+// RUN: grep '.1 = bitcast i64. .tmp to .struct.f18_s0.' %t &&
+// RUN: grep '.2 = load .struct.f18_s0. .1, align 1' %t &&
+// RUN: grep 'store .struct.f18_s0 .2, .struct.f18_s0. .f18_arg1' %t &&
+void f18(int a, struct f18_s0 { int f0; } f18_arg1) {}
+
 // RUN: true