[llvm-branch-commits] [llvm-branch] r73424 - in /llvm/branches/Apple/Bender: lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86Subtarget.cpp lib/Target/X86/X86Subtarget.h test/CodeGen/X86/call-imm.ll
Bill Wendling
isanbard at gmail.com
Mon Jun 15 14:25:22 PDT 2009
Author: void
Date: Mon Jun 15 16:25:22 2009
New Revision: 73424
URL: http://llvm.org/viewvc/llvm-project?rev=73424&view=rev
Log:
--- Merging r72160 into '.':
U test/CodeGen/X86/call-imm.ll
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86Subtarget.h
U lib/Target/X86/X86Subtarget.cpp
Modified:
llvm/branches/Apple/Bender/lib/Target/X86/X86InstrInfo.td
llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.cpp
llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.h
llvm/branches/Apple/Bender/test/CodeGen/X86/call-imm.ll
Modified: llvm/branches/Apple/Bender/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender/lib/Target/X86/X86InstrInfo.td?rev=73424&r1=73423&r2=73424&view=diff
==============================================================================
--- llvm/branches/Apple/Bender/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/branches/Apple/Bender/lib/Target/X86/X86InstrInfo.td Mon Jun 15 16:25:22 2009
@@ -235,9 +235,9 @@
def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;
def NotSmallCode : Predicate<"TM.getCodeModel() != CodeModel::Small">;
def IsStatic : Predicate<"TM.getRelocationModel() == Reloc::Static">;
-def IsNotPIC : Predicate<"TM.getRelocationModel() != Reloc::PIC_">;
def OptForSpeed : Predicate<"!OptForSize">;
def FastBTMem : Predicate<"!Subtarget->isBTMemSlow()">;
+def CallImmAddr : Predicate<"Subtarget->IsLegalToCallImmediateAddr(TM)">;
//===----------------------------------------------------------------------===//
// X86 Instruction Format Definitions.
@@ -555,8 +555,7 @@
XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
Uses = [ESP] in {
def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
- "call\t${dst:call}", [(X86call imm:$dst)]>,
- Requires<[In32BitMode, IsNotPIC]>;
+ "call\t${dst:call}", []>;
def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
"call\t{*}$dst", [(X86call GR32:$dst)]>;
def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
@@ -3225,6 +3224,8 @@
(CALLpcrel32 tglobaladdr:$dst)>;
def : Pat<(X86call (i32 texternalsym:$dst)),
(CALLpcrel32 texternalsym:$dst)>;
+def : Pat<(X86call (i32 imm:$dst)),
+ (CALLpcrel32 imm:$dst)>, Requires<[CallImmAddr]>;
// X86 specific add which produces a flag.
def : Pat<(addc GR32:$src1, GR32:$src2),
Modified: llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.cpp?rev=73424&r1=73423&r2=73424&view=diff
==============================================================================
--- llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.cpp Mon Jun 15 16:25:22 2009
@@ -70,8 +70,8 @@
/// cases where GVRequiresExtraLoad is true. Some variations of PIC require
/// a register, but not an extra load.
bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV,
- const TargetMachine& TM,
- bool isDirectCall) const
+ const TargetMachine& TM,
+ bool isDirectCall) const
{
if (GVRequiresExtraLoad(GV, TM, isDirectCall))
return true;
@@ -95,6 +95,14 @@
return 0;
}
+/// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
+/// to immediate address.
+bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
+ if (Is64Bit)
+ return false;
+ return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
+}
+
/// getSpecialAddressLatency - For targets where it is beneficial to
/// backschedule instructions that compute addresses, return a value
/// indicating the number of scheduling cycles of backscheduling that
Modified: llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.h?rev=73424&r1=73423&r2=73424&view=diff
==============================================================================
--- llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/branches/Apple/Bender/lib/Target/X86/X86Subtarget.h Mon Jun 15 16:25:22 2009
@@ -189,6 +189,10 @@
bool GVRequiresRegister(const GlobalValue* GV, const TargetMachine& TM,
bool isDirectCall) const;
+ /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
+ /// to immediate address.
+ bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
+
/// This function returns the name of a function which has an interface
/// like the non-standard bzero function, if such a function exists on
/// the current subtarget and it is considered prefereable over
Modified: llvm/branches/Apple/Bender/test/CodeGen/X86/call-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender/test/CodeGen/X86/call-imm.ll?rev=73424&r1=73423&r2=73424&view=diff
==============================================================================
--- llvm/branches/Apple/Bender/test/CodeGen/X86/call-imm.ll (original)
+++ llvm/branches/Apple/Bender/test/CodeGen/X86/call-imm.ll Mon Jun 15 16:25:22 2009
@@ -1,5 +1,6 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {call.*12345678}
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic | not grep {call.*12345678}
+; RUN: llvm-as < %s | llc -mtriple=i386-darwin-apple -relocation-model=static | grep {call.*12345678}
+; RUN: llvm-as < %s | llc -mtriple=i386-darwin-apple -relocation-model=pic | not grep {call.*12345678}
+; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep {call.*12345678}
; Call to immediate is not safe on x86-64 unless we *know* that the
; call will be within 32-bits pcrel from the dest immediate.
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