[llvm-branch-commits] [llvm-branch] r90273 - in /llvm/branches/Apple/Zoidberg: lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
Evan Cheng
evan.cheng at apple.com
Tue Dec 1 14:34:30 PST 2009
Author: evancheng
Date: Tue Dec 1 16:34:29 2009
New Revision: 90273
URL: http://llvm.org/viewvc/llvm-project?rev=90273&view=rev
Log:
Merge 90269.
Added:
llvm/branches/Apple/Zoidberg/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
Modified:
llvm/branches/Apple/Zoidberg/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/SimpleRegisterCoalescing.cpp
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=90273&r1=90272&r2=90273&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Dec 1 16:34:29 2009
@@ -374,8 +374,6 @@
// Value#0 is now defined by the 2-addr instruction.
OldValNo->def = RedefIndex;
OldValNo->setCopy(0);
- if (MO.isEarlyClobber())
- OldValNo->setHasRedefByEC(true);
// Add the new live interval which replaces the range for the input copy.
LiveRange LR(DefIndex, RedefIndex, ValNo);
@@ -513,8 +511,6 @@
if (mi->isRegTiedToUseOperand(DefIdx)) {
// Two-address instruction.
end = baseIndex.getDefIndex();
- assert(!mi->getOperand(DefIdx).isEarlyClobber() &&
- "Two address instruction is an early clobber?");
} else {
// Another instruction redefines the register before it is ever read.
// Then the register is essentially dead at the instruction that defines
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=90273&r1=90272&r2=90273&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Dec 1 16:34:29 2009
@@ -1938,6 +1938,10 @@
if (Overlaps) {
// If we haven't already recorded that this value # is safe, check it.
if (!InVector(LHSIt->valno, EliminatedLHSVals)) {
+ // If it's re-defined by an early clobber somewhere in the live range,
+ // then conservatively abort coalescing.
+ if (LHSIt->valno->hasRedefByEC())
+ return false;
// Copy from the RHS?
if (!RangeIsDefinedByCopyFromReg(LHS, LHSIt, RHS.reg))
return false; // Nope, bail out.
@@ -1977,6 +1981,10 @@
// if coalescing succeeds. Just skip the liverange.
if (++LHSIt == LHSEnd) break;
} else {
+ // If it's re-defined by an early clobber somewhere in the live range,
+ // then conservatively abort coalescing.
+ if (LHSIt->valno->hasRedefByEC())
+ return false;
// Otherwise, if this is a copy from the RHS, mark it as being merged
// in.
if (RangeIsDefinedByCopyFromReg(LHS, LHSIt, RHS.reg)) {
@@ -2316,6 +2324,10 @@
if (LHSValNoAssignments[I->valno->id] !=
RHSValNoAssignments[J->valno->id])
return false;
+ // If it's re-defined by an early clobber somewhere in the live range,
+ // then conservatively abort coalescing.
+ if (NewVNInfo[LHSValNoAssignments[I->valno->id]]->hasRedefByEC())
+ return false;
}
if (I->end < J->end) {
Added: llvm/branches/Apple/Zoidberg/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll?rev=90273&view=auto
==============================================================================
--- llvm/branches/Apple/Zoidberg/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll (added)
+++ llvm/branches/Apple/Zoidberg/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll Tue Dec 1 16:34:29 2009
@@ -0,0 +1,38 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; pr5391
+
+define void @t() nounwind ssp {
+entry:
+; CHECK: t:
+; CHECK: movl %ecx, %eax
+; CHECK: %eax = foo (%eax, %ecx)
+ %b = alloca i32 ; <i32*> [#uses=2]
+ %a = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %1 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %asmtmp = call i32 asm "$0 = foo ($1, $2)", "=&{ax},%0,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp, i32* %a
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @t2() nounwind ssp {
+entry:
+; CHECK: t2:
+; CHECK: movl %eax, %ecx
+; CHECK: %ecx = foo (%ecx, %eax)
+ %b = alloca i32 ; <i32*> [#uses=2]
+ %a = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %1 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %asmtmp = call i32 asm "$0 = foo ($1, $2)", "=&r,%0,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp, i32* %a
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
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