[llvm-branch-commits] [llvm-branch] r68657 - in /llvm/branches/Apple/Dib: lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/X86/and-su.ll

[Bill Wendling]

Author: void
Date: Wed Apr  8 18:42:55 2009
New Revision: 68657

URL: http://llvm.org/viewvc/llvm-project?rev=68657&view=rev
Log:
--- Merging (from foreign repository) r68398 into '.':
A    test/CodeGen/X86/and-su.ll
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp

Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.

Added:
    llvm/branches/Apple/Dib/test/CodeGen/X86/and-su.ll
Modified:
    llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=68657&r1=68656&r2=68657&view=diff

==============================================================================
--- llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Apr  8 18:42:55 2009
@@ -1533,6 +1533,7 @@
       // in the same partial word, see if we can shorten the load.
       if (DCI.isBeforeLegalize() &&
           N0.getOpcode() == ISD::AND && C1 == 0 &&
+          N0.getNode()->hasOneUse() &&
           isa<LoadSDNode>(N0.getOperand(0)) &&
           N0.getOperand(0).getNode()->hasOneUse() &&
           isa<ConstantSDNode>(N0.getOperand(1))) {

Added: llvm/branches/Apple/Dib/test/CodeGen/X86/and-su.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/and-su.ll?rev=68657&view=auto

==============================================================================
--- llvm/branches/Apple/Dib/test/CodeGen/X86/and-su.ll (added)
+++ llvm/branches/Apple/Dib/test/CodeGen/X86/and-su.ll Wed Apr  8 18:42:55 2009
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep {(%} | count 1
+
+; Don't duplicate the load.
+
+define fastcc i32 @foo(i32* %p) nounwind {
+	%t0 = load i32* %p
+	%t2 = and i32 %t0, 10
+	%t3 = icmp ne i32 %t2, 0
+	br i1 %t3, label %bb63, label %bb76
+
+bb63:
+	ret i32 %t2
+
+bb76:
+	ret i32 0
+}