[lldb-dev] DWARF Register Mapping in SysV-x86_64 ABI

Abhishek Aggarwal abhiinnitald at gmail.com
Thu Apr 16 00:50:19 PDT 2015

In the ABI Specification document, mm0-mm7 registers have been assigned
separate numbers than st0-st7 while gcc_dwarf_regnums misses the entries
for mm0-mm7 altogether.

On Wed, Apr 15, 2015 at 10:15 PM, Greg Clayton <gclayton at apple.com> wrote:

> > On Apr 15, 2015, at 5:21 AM, Abhishek Aggarwal <abhiinnitald at gmail.com>
> wrote:
> >
> > Hello Greg
> >
> > I was going through the code of x86_64 SysV ABI implementation
> (ABISysV_x86_64.cpp). I noticed one thing that DWARF Register Number
> mapping is not in conformance with the SysV-ABI Specification document for
> x86_64. The reference document I am using is "System V Application Binary
> Interface, AMD64 Architecture Processor Supplement, Draft Version 0.99.6,
> October 7, 2013".
> >
> > I hope the register number mapping is present in the enum
> "gcc_dwarf_regnums". I don't know whether I am missing something here but
> can you throw some light on it ?
> We match everything except ymm8-ymm15 and we are missing all register
> entries that follow mm7, but those aren't ever used in any DWARF
> expressions locations that our compilers generate, so we haven't needed
> those definitions.
> If you want to see what clang uses you can checkout:
> svn cat
> http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td
> What registers are you worried about? Feel free to add any register x86_64
> dwarf definitions that are in the spec and missing from our
> gcc_dwarf_regnums, but don't remove or change any that are already there.
> Greg Clayton
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