[Lldb-commits] [lldb] [lldb][RISCV] Don't abort on an SC instruction outside a recognized LR/SC sequence (PR #238120)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp --diff_from_common_commit
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View the diff from clang-format here.
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``````````diff
diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
index 5b5d352ab..a19369cab 100644
--- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
+++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
@@ -1245,9 +1245,9 @@ public:
   // RV32A & RV64A (The standard atomic instruction extension) //
   bool operator()(LR_W) { return AtomicSequence(m_emu); }
   bool operator()(LR_D) { return AtomicSequence(m_emu); }
-  // A well-formed LR/SC loop is consumed by AtomicSequence. An SC reached on its
-  // own (a differently shaped loop, or analysis starting mid-function) cannot be
-  // emulated, so report failure instead of aborting the debugger.
+  // A well-formed LR/SC loop is consumed by AtomicSequence. An SC reached on
+  // its own (a differently shaped loop, or analysis starting mid-function)
+  // cannot be emulated, so report failure instead of aborting the debugger.
   bool operator()(SC_W) { return false; }
   bool operator()(SC_D) { return false; }
   bool operator()(AMOSWAP_W inst) {

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https://github.com/llvm/llvm-project/pull/238120