[Lldb-commits] [lldb] [lldb] Correct alignment of register fields (PR #209140)
David Spickett via lldb-commits
lldb-commits at lists.llvm.org
Mon Jul 13 04:08:27 PDT 2026
https://github.com/DavidSpickett created https://github.com/llvm/llvm-project/pull/209140
In #188049 the alignment of register names for the raw value part "pc = 0x..." changed.
This resulted in many register fields being 2 spaces off where they should be, because the stream we were printing to had a 2 space indent set where it had none before.
This is actually a bug in the original field formatting code. It assumed the stream had no indent level of its own. So the fix is to indent using the stream (the 2 spaces), then indent to where the register name ends.
>From 098adabbca31f1637dee2331490d67c97e5d20a1 Mon Sep 17 00:00:00 2001
From: David Spickett <david.spickett at arm.com>
Date: Mon, 13 Jul 2026 11:01:52 +0000
Subject: [PATCH] [lldb] Correct alignment of register fields
In #188049 the alignment of register names for the raw value
part "pc = 0x..." changed.
This resulted in many fields being 2 spaces off where they
should be, because the stream we were printing to had a 2 space
indent set.
This is actually a bug in the original field formatting code.
It assumed the stream had no indent level of its own. So
the fix is to indent using the stream (the 2 spaces),
then indent to where the register name ends.
---
lldb/source/Core/DumpRegisterValue.cpp | 4 ++-
.../gdb_remote_client/TestXMLRegisterFlags.py | 26 +++++++-------
.../permission_overlay/TestAArch64LinuxPOE.py | 36 +++++++++----------
3 files changed, 34 insertions(+), 32 deletions(-)
diff --git a/lldb/source/Core/DumpRegisterValue.cpp b/lldb/source/Core/DumpRegisterValue.cpp
index 0a834bcd89960..6bd6a2e9545d2 100644
--- a/lldb/source/Core/DumpRegisterValue.cpp
+++ b/lldb/source/Core/DumpRegisterValue.cpp
@@ -156,7 +156,9 @@ void lldb_private::DumpRegisterValue(const RegisterValue ®_val, Stream &s,
while (fields_str.size()) {
std::pair<llvm::StringRef, llvm::StringRef> split = fields_str.split('\n');
fields_str = split.second;
- // Indent as far as the register name did.
+ // Indent as much as the stream does.
+ s.Indent();
+ // Indent further to match where the register name finishes.
s.Printf(fmt.c_str(), "");
// Lines after the first won't have " = " so compensate for that.
diff --git a/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py b/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
index 061090e9b6907..dcd0d2df6b298 100644
--- a/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
+++ b/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
@@ -195,9 +195,9 @@ def test_little_endian_target_order(self):
"register read cpsr x0",
substrs=[
" cpsr = 0xeeee7777\n"
- " = (msb = 1, lsb = 1)\n"
+ " = (msb = 1, lsb = 1)\n"
" x0 = 0xeeeeeeee77777777\n"
- " = (msb = 1, lsb = 1)"
+ " = (msb = 1, lsb = 1)"
],
)
@@ -238,9 +238,9 @@ def test_big_endian_target_order(self):
"register read r0 fpc",
substrs=[
" r0 = 0x77777777eeeeeeee\n"
- " = (msb = 0, lsb = 0)\n"
+ " = (msb = 0, lsb = 0)\n"
" fpc = 0x7777eeee\n"
- " = (msb = 0, lsb = 0)\n"
+ " = (msb = 0, lsb = 0)\n"
],
)
@@ -267,9 +267,9 @@ def test_many_flag_sets(self):
"register read cpsr x0",
substrs=[
" cpsr = 0xeeee7777\n"
- " = (correct = 1)\n"
+ " = (correct = 1)\n"
" x0 = 0xeeeeeeee77777777\n"
- " = (foo = 1)"
+ " = (foo = 1)"
],
)
@@ -450,13 +450,13 @@ def test_flags_multiple_lines(self):
self.expect(
"register read cpsr",
substrs=[
- "cpsr = 0xeeee7777\n"
- " = {\n"
- " this_is_a_long_field_3 = 0\n"
- " this_is_a_long_field_2 = 1\n"
- " this_is_a_long_field_1 = 1\n"
- " this_is_a_long_field_0 = 1\n"
- " }"
+ " cpsr = 0xeeee7777\n"
+ " = {\n"
+ " this_is_a_long_field_3 = 0\n"
+ " this_is_a_long_field_2 = 1\n"
+ " this_is_a_long_field_1 = 1\n"
+ " this_is_a_long_field_0 = 1\n"
+ " }"
],
)
diff --git a/lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py b/lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
index 36f542793bf8b..9832b30ed0087 100644
--- a/lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
+++ b/lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
@@ -14,24 +14,24 @@ class AArch64LinuxPOE(TestBase):
EXPECTED_POR_EL0 = "por_el0 = 0x0000000001234567"
EXPECTED_POR_EL0_FIELDS = (
- " = {\n"
- " Perm15 = No Access\n"
- " Perm14 = No Access\n"
- " Perm13 = No Access\n"
- " Perm12 = No Access\n"
- " Perm11 = No Access\n"
- " Perm10 = No Access\n"
- " Perm9 = No Access\n"
- " Perm8 = No Access\n"
- " Perm7 = No Access\n"
- " Perm6 = Read\n"
- " Perm5 = Execute\n"
- " Perm4 = Read, Execute\n"
- " Perm3 = Write\n"
- " Perm2 = Write, Read\n"
- " Perm1 = Write, Execute\n"
- " Perm0 = Read, Write, Execute\n"
- " }"
+ " = {\n"
+ " Perm15 = No Access\n"
+ " Perm14 = No Access\n"
+ " Perm13 = No Access\n"
+ " Perm12 = No Access\n"
+ " Perm11 = No Access\n"
+ " Perm10 = No Access\n"
+ " Perm9 = No Access\n"
+ " Perm8 = No Access\n"
+ " Perm7 = No Access\n"
+ " Perm6 = Read\n"
+ " Perm5 = Execute\n"
+ " Perm4 = Read, Execute\n"
+ " Perm3 = Write\n"
+ " Perm2 = Write, Read\n"
+ " Perm1 = Write, Execute\n"
+ " Perm0 = Read, Write, Execute\n"
+ " }"
)
@skipUnlessArch("aarch64")
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