[Lldb-commits] [lldb] [lldb][RISCV] Fix x8 register aliasing for gdb-remote targets (PR #209070)

[Zeyi Xu via lldb-commits]

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@@ -780,9 +780,9 @@ def haltReason(self):
         self.match("register read x5", ["t0 = 0x0807060504030201"])
         self.match("register read x6", ["t1 = 0x0807060504030201"])
         self.match("register read x7", ["t2 = 0x0807060504030201"])
-        # Register x8 is probably not working because it has two aliases fp, s0
-        # See issue #127900
-        # self.match("register read x8", ["fp = 0x0807060504030201"])
+        self.match("register read fp", ["s0 = 0x0807060504030201"])
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zeyi2 wrote:

TBH, I'm not entirely sure whether changing the name from `fp` to `s0` is acceptable from LLDB's perspective. If that's a concern, I'm happy to look for another approach.

https://github.com/llvm/llvm-project/pull/209070