[Lldb-commits] [lldb] 8d61da2 - [lldb] Only run rv32 corefile test if rv32 llvm target enabled (#204040)

via lldb-commits lldb-commits at lists.llvm.org
Mon Jun 15 17:58:48 PDT 2026


Author: Jason Molenda
Date: 2026-06-16T00:58:42Z
New Revision: 8d61da2569a975346150371cb0d317fb9339be0c

URL: https://github.com/llvm/llvm-project/commit/8d61da2569a975346150371cb0d317fb9339be0c
DIFF: https://github.com/llvm/llvm-project/commit/8d61da2569a975346150371cb0d317fb9339be0c.diff

LOG: [lldb] Only run rv32 corefile test if rv32 llvm target enabled (#204040)

Added: 
    

Modified: 
    lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py

Removed: 
    


################################################################################
diff  --git a/lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py b/lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py
index d485fcdcb6706..a7f784085782c 100644
--- a/lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py
+++ b/lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py
@@ -14,7 +14,7 @@ class TestRV32MachOCorefile(TestBase):
     NO_DEBUG_INFO_TESTCASE = True
 
     @no_debug_info_test
-    @skipIfRemote
+    @skipIfLLVMTargetMissing("RISCV")
     def test_riscv32_gpr_corefile_registers(self):
         corefile = self.getBuildArtifact("core")
         self.yaml2macho_core("riscv32-registers.yaml", corefile)


        


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