[Lldb-commits] [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)

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@@ -813,6 +813,13 @@ def XSeqPairsClass   : RegisterClass<"AArch64", [untyped], 64,
                                      (add XSeqPairs)>{
   let Size = 128;
 }
+def SyspPairsClass   : RegisterClass<"AArch64", [untyped], 64,
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Lukacma wrote:

We want to avoid adding as much custom code as possible imo for maintanability. To me adding additional physical register class is good tradeoff to achieve that. 

https://github.com/llvm/llvm-project/pull/182410