[Lldb-commits] [lldb] [lldb][RISCV] Fix return value reading (PR #163931)

David Spickett via lldb-commits lldb-commits at lists.llvm.org
Thu Oct 23 06:39:37 PDT 2025


================
@@ -602,7 +604,104 @@ GetValObjFromFPRegs(Thread &thread, const RegisterContextSP &reg_ctx,
                                           value, ConstString(""));
   }
   // we should never reach this, but if we do, use the integer registers
-  return GetValObjFromIntRegs(thread, reg_ctx, machine, type_flags, byte_size);
+  return GetValObjFromIntRegs(thread, reg_ctx, machine, compiler_type,
+                              byte_size);
+}
+
+static DataExtractor CopyReturnValueToBuffer(ExecutionContext &exe_ctx,
+                                             RegisterValue &a0_reg_value,
+                                             RegisterValue &a1_reg_value,
+                                             const size_t xlen_byte_size,
+                                             const uint32_t byte_size) {
+
+  DataExtractor a0_extractor;
+  DataExtractor a1_extractor;
+
+  // RISC-V ABI stands:
+  // "Aggregates whose total size is no more than XLEN bits
+  // are passed in a register, with the fields laid out as though
+  // they were passed in memory."
+  if (byte_size <= xlen_byte_size) {
+    // value is stored only in a0
+    a0_reg_value.GetData(a0_extractor);
+    // shrink data to byte_size length
+    DataExtractor data{a0_extractor, 0, byte_size};
+    return data;
+  }
+
+  // "Aggregates whose total size is no more than 2×XLEN bits
+  // are passed in a pair of registers;"
----------------
DavidSpickett wrote:

Oh ok so the quote is for *passing* and when passing you could have many pairs. For a return, we'll only have 1 pair a0 and a1. I guess RISC-V is like the Arm ABI where passing and returning are largely the same rules.

With that context, I understand it now.

https://github.com/llvm/llvm-project/pull/163931


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