[Lldb-commits] [lldb] 68a253d - [lldb][RISCV] Use uint64_t for emulating ADDI (#160550)

[via lldb-commits]

Author: Ivan Tadeu Ferreira Antunes Filho
Date: 2025-09-25T12:32:31-04:00
New Revision: 68a253da6498abe20b0e61e9dce488943aaf2c28

URL: https://github.com/llvm/llvm-project/commit/68a253da6498abe20b0e61e9dce488943aaf2c28
DIFF: https://github.com/llvm/llvm-project/commit/68a253da6498abe20b0e61e9dce488943aaf2c28.diff

LOG: [lldb][RISCV] Use uint64_t for emulating ADDI (#160550)

In RISC-V, the same instruction is used for both signed and unsigned
additions.

Signed integer overflow is undefined behavior in C++, but signed integer
overflow is defined behavior when using ADDI in RISC-V.

As we are emulating the RISC-V behavior we should be using uint.


This fix the failure with ubsan introduced by #159842:
lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp:807:40:
runtime error: signed integer overflow: -9223372036854775808 + -16
cannot be represented in type 'int64_t' (aka 'long')

Added: 
    

Modified: 
    lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp

Removed: 
    


################################################################################
diff  --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
index 20661290ca4c6..5c1b7d4943b3f 100644
--- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
+++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
@@ -804,7 +804,7 @@ class Executor {
     return transformOptional(
                inst.rs1.ReadI64(m_emu),
                [&](int64_t rs1) {
-                 int64_t result = rs1 + int64_t(SignExt(inst.imm));
+                 uint64_t result = rs1 + uint64_t(SignExt(inst.imm));
                  // Check if this is a stack pointer adjustment.
                  if (inst.rd.rd == RISCV_GPR_SP &&
                      inst.rs1.rs == RISCV_GPR_SP) {