[Lldb-commits] [lldb] RISCV unwinding enable (PR #158161)
David Peixotto via lldb-commits
lldb-commits at lists.llvm.org
Fri Sep 12 10:13:41 PDT 2025
================
@@ -1745,6 +1831,61 @@ EmulateInstructionRISCV::GetRegisterInfo(RegisterKind reg_kind,
return array[reg_index];
}
+bool EmulateInstructionRISCV::SetInstruction(const Opcode &opcode,
+ const Address &inst_addr,
+ Target *target) {
+ // Call the base class implementation
+ if (!EmulateInstruction::SetInstruction(opcode, inst_addr, target))
+ return false;
+
+ // Extract instruction data from the opcode
+ uint32_t inst_data = 0;
+ const void *opcode_data = m_opcode.GetOpcodeBytes();
+ if (!opcode_data)
+ return false;
+
+ if (m_opcode.GetByteSize() == 2) {
+ // 16-bit compressed instruction
+ const uint16_t *data = static_cast<const uint16_t *>(opcode_data);
+ inst_data = *data;
+ } else if (m_opcode.GetByteSize() == 4) {
+ // 32-bit instruction
+ const uint32_t *data = static_cast<const uint32_t *>(opcode_data);
+ inst_data = *data;
+ } else {
+ return false;
+ }
+
+ // Decode the instruction
+ auto decoded_inst = Decode(inst_data);
+ if (!decoded_inst)
+ return false;
+
+ // Store the decoded result
+ m_decoded = *decoded_inst;
+ return true;
+}
+
+bool EmulateInstructionRISCV::CreateFunctionEntryUnwind(
+ UnwindPlan &unwind_plan) {
+ unwind_plan.Clear();
+ unwind_plan.SetRegisterKind(eRegisterKindLLDB);
+
+ UnwindPlan::Row row;
+
+ row.GetCFAValue().SetIsRegisterPlusOffset(gpr_sp_riscv, 0);
+ row.SetRegisterLocationToSame(gpr_ra_riscv, /*must_replace=*/false);
+ row.SetRegisterLocationToSame(gpr_fp_riscv, /*must_replace=*/false);
+
+ unwind_plan.AppendRow(std::move(row));
+ unwind_plan.SetSourceName("EmulateInstructionRISCV");
+ unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
+ unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolYes);
----------------
dmpots wrote:
Is this unwind plan truly valid at all instructions?
https://github.com/llvm/llvm-project/pull/158161
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