[Lldb-commits] [lldb] [lldb][NFC] Architecture plugins should report the vector element order (PR #157198)

David Spickett via lldb-commits lldb-commits at lists.llvm.org
Mon Sep 8 02:13:18 PDT 2025


DavidSpickett wrote:

I can confirm that AArch64 Neon and SVE work as stated:

> B2.9.3.2 Endianness in SIMD operations
> 
> ...The four elements appear in the register in array order, with the
> lowest indexed element fetched from the lowest address. The order of bytes in the elements depends on the endianness
> configuration, as shown in Figure B2-3. Therefore, the **order of the elements in the registers is the same regardless of the
> endianness configuration**.
> 
> B2.9.3.3 Endianness in SVE operations
> 
> Rules on byte and element order of SIMD load and store instructions apply to SVE load and store instructions.

Do we know what vector extension s390x has and what order it uses?

https://github.com/llvm/llvm-project/pull/157198


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