[Lldb-commits] [lldb] [lldb][RISCV][test] make atomic region stepping test more robust (PR #156506)

via lldb-commits lldb-commits at lists.llvm.org
Wed Sep 3 07:21:58 PDT 2025


================
@@ -26,19 +26,26 @@ def do_sequence_test(self, filename, bkpt_name):
             substrs=["stopped", "stop reason = instruction step into"],
         )
 
-        pc = cur_thread.GetFrameAtIndex(0).GetPC()
+        # Get the instruction we stopped at
+        pc = cur_thread.GetFrameAtIndex(0).GetPCAddress()
+        inst = target.ReadInstructions(pc, 1).GetInstructionAtIndex(0)
 
-        return pc - entry_pc
+        inst_mnemonic = inst.GetMnemonic(target)
+        inst_operands = inst.GetOperands(target)
+        if not inst_operands:
+            return inst_mnemonic
 
-    @skipIf(archs=no_match("^rv.*"))
+        return f"{inst_mnemonic} {inst_operands}"
+
+    @skipIf(archs=no_match("^riscv.*"))
     def test_cas(self):
         """
         This test verifies LLDB instruction step handling of a proper lr/sc pair.
         """
-        difference = self.do_sequence_test("main", "cas")
-        self.assertEqual(difference, 0x1A)
+        instruction = self.do_sequence_test("main", "cas")
+        self.assertEqual(instruction, "nop")
 
-    @skipIf(archs=no_match("^rv.*"))
----------------
dlav-sc wrote:

Yeah, I didn't notice that we actually changed the regex for RISCV in https://github.com/llvm/llvm-project/pull/130034. Maybe `^rv.*` works somehow too, because I was able to run the tests. Or maybe I didn't have the patch on my branch.

Anyway, after https://github.com/llvm/llvm-project/pull/130034, we can use `riscv32` and `riscv64`. For any RISCV target, I use `^riscv.*` - for example, in the software watchpoints tests.

I noticed that `lldb/test/API/riscv/break-undecoded/TestBreakpointIllegal.py` has the old regex, we should change it at some point.

https://github.com/llvm/llvm-project/pull/156506


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