[Lldb-commits] [lldb] [LLDB][AArch64] Make TPIDR a generic tp register (PR #154444)

Jacob Lalonde via lldb-commits lldb-commits at lists.llvm.org
Wed Aug 27 14:33:06 PDT 2025


https://github.com/Jlalond updated https://github.com/llvm/llvm-project/pull/154444

>From 3b6592ce5de7bc04195ec17163e788b8ff463ca1 Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Tue, 19 Aug 2025 16:46:22 -0700
Subject: [PATCH 1/7] Make tpidr a generic thread pointer register on aarch

---
 .../source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
index fbf128553fd5e..a973677552312 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -79,7 +79,8 @@ static lldb_private::RegisterInfo g_register_infos_mte[] = {
     DEFINE_EXTENSION_REG(mte_ctrl)};
 
 static lldb_private::RegisterInfo g_register_infos_tls[] = {
-    DEFINE_EXTENSION_REG(tpidr),
+    {"tpidr", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_TP}, nullptr, nullptr, nullptr},
     // Only present when SME is present
     DEFINE_EXTENSION_REG(tpidr2)};
 

>From 10faf5b1d009fc4b834fe29c50a0d3d71ea40c27 Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Tue, 19 Aug 2025 17:07:02 -0700
Subject: [PATCH 2/7] Add a test

---
 .../aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py      | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py b/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
index ec8eb1c05dfb8..09c2cca18f9c0 100644
--- a/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
+++ b/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
@@ -93,6 +93,8 @@ def check_tls_reg(self, registers):
         for register in registers:
             self.expect("p {}_was_set".format(register), substrs=["true"])
 
+        self.expect("reg read tp", substrs=[hex(set_values["tpidr"])])
+
     @skipUnlessArch("aarch64")
     @skipUnlessPlatform(["linux"])
     def test_tls_no_sme(self):
@@ -100,6 +102,7 @@ def test_tls_no_sme(self):
             self.skipTest("SME must not be present.")
 
         self.check_tls_reg(["tpidr"])
+        
 
     @skipUnlessArch("aarch64")
     @skipUnlessPlatform(["linux"])

>From 84f48ee04b1b12d323ba83f169ca41261bb93319 Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Tue, 19 Aug 2025 17:07:12 -0700
Subject: [PATCH 3/7] Format

---
 .../Process/Utility/RegisterInfoPOSIX_arm64.cpp      | 12 ++++++++++--
 .../tls_registers/TestAArch64LinuxTLSRegisters.py    |  1 -
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
index a973677552312..d29af3c568dd7 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -79,8 +79,16 @@ static lldb_private::RegisterInfo g_register_infos_mte[] = {
     DEFINE_EXTENSION_REG(mte_ctrl)};
 
 static lldb_private::RegisterInfo g_register_infos_tls[] = {
-    {"tpidr", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex,
-     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_TP}, nullptr, nullptr, nullptr},
+    {"tpidr",
+     nullptr,
+     8,
+     0,
+     lldb::eEncodingUint,
+     lldb::eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_TP},
+     nullptr,
+     nullptr,
+     nullptr},
     // Only present when SME is present
     DEFINE_EXTENSION_REG(tpidr2)};
 
diff --git a/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py b/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
index 09c2cca18f9c0..172f640358f33 100644
--- a/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
+++ b/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
@@ -102,7 +102,6 @@ def test_tls_no_sme(self):
             self.skipTest("SME must not be present.")
 
         self.check_tls_reg(["tpidr"])
-        
 
     @skipUnlessArch("aarch64")
     @skipUnlessPlatform(["linux"])

>From 2fa8e364581c2110709f81a1f9330b49495462a6 Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Thu, 21 Aug 2025 14:59:27 -0700
Subject: [PATCH 4/7] Refactor defines

---
 .../Process/Utility/RegisterInfoPOSIX_arm64.cpp       | 11 +----------
 .../Plugins/Process/Utility/RegisterInfos_arm64.h     | 10 ++++++++++
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
index d29af3c568dd7..3b8d6a84c964c 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -79,16 +79,7 @@ static lldb_private::RegisterInfo g_register_infos_mte[] = {
     DEFINE_EXTENSION_REG(mte_ctrl)};
 
 static lldb_private::RegisterInfo g_register_infos_tls[] = {
-    {"tpidr",
-     nullptr,
-     8,
-     0,
-     lldb::eEncodingUint,
-     lldb::eFormatHex,
-     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_TP},
-     nullptr,
-     nullptr,
-     nullptr},
+    DEFINE_EXTENSION_REG_GENERIC(tpidr, LLDB_REGNUM_GENERIC_TP),
     // Only present when SME is present
     DEFINE_EXTENSION_REG(tpidr2)};
 
diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index c9c4d7ceae557..bdc0c1de8d8cc 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -470,6 +470,9 @@ static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
         LLDB_INVALID_REGNUM, lldb_kind                                         \
   }
 
+#define GENERIC_KIND(genenric_kind)                                            \
+  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, genenric_kind,                    \
+   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM}
 // Generates register kinds array for registers with only lldb kind
 #define KIND_ALL_INVALID                                                       \
   {                                                                            \
@@ -540,6 +543,13 @@ static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
     #reg, nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex,                \
         KIND_ALL_INVALID, nullptr, nullptr, nullptr,                           \
   }
+  
+// Used to define tpidr as a generic tp register
+#define DEFINE_EXTENSION_REG_GENERIC(reg, generic_kind)                        \
+  {                                                                            \
+    #reg, nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex,                \
+        GENERIC_KIND(generic_kind), nullptr, nullptr, nullptr,                 \
+  }
 
 static lldb_private::RegisterInfo g_register_infos_arm64_le[] = {
     // DEFINE_GPR64(name, GENERIC KIND)

>From 1292a0da413a30cc54dcc81f225f476fe9d1942c Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Thu, 21 Aug 2025 15:02:37 -0700
Subject: [PATCH 5/7] Fix some weird formatting in the defines from gcf

---
 lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index bdc0c1de8d8cc..801a4f91d597b 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -471,8 +471,10 @@ static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
   }
 
 #define GENERIC_KIND(genenric_kind)                                            \
-  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, genenric_kind,                    \
-   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM}
+  {                                                                            \
+   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, genenric_kind,                    \
+    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM                                   \
+  }
 // Generates register kinds array for registers with only lldb kind
 #define KIND_ALL_INVALID                                                       \
   {                                                                            \

>From e1c02b803abbc77b50df2e881fafc9911f3e9c9b Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Thu, 21 Aug 2025 15:11:21 -0700
Subject: [PATCH 6/7] Move the clang-format off to the top of the defines

---
 lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index 801a4f91d597b..9c6c6feb869a5 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -456,6 +456,7 @@ static uint32_t g_d29_invalidates[] = {fpu_v29, fpu_s29, LLDB_INVALID_REGNUM};
 static uint32_t g_d30_invalidates[] = {fpu_v30, fpu_s30, LLDB_INVALID_REGNUM};
 static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
 
+// clang-format off
 // Generates register kinds array with DWARF, EH frame and generic kind
 #define MISC_KIND(reg, type, generic_kind)                                     \
   {                                                                            \
@@ -489,8 +490,6 @@ static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
 #define MISC_FPU_KIND(lldb_kind) LLDB_KIND(lldb_kind)
 #define MISC_EXC_KIND(lldb_kind) LLDB_KIND(lldb_kind)
 
-// clang-format off
-
 // Defines a 64-bit general purpose register
 #define DEFINE_GPR64(reg, generic_kind)                                        \
   {                                                                            \

>From b7f8f3fd3f84f673e5cb535729b850affeaaa00d Mon Sep 17 00:00:00 2001
From: Jacob Lalonde <jalalonde at fb.com>
Date: Wed, 27 Aug 2025 14:32:49 -0700
Subject: [PATCH 7/7] Implement feedback from David

---
 lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h     | 1 -
 .../aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py     | 4 ++--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index 9c6c6feb869a5..829fa076d221e 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -545,7 +545,6 @@ static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
         KIND_ALL_INVALID, nullptr, nullptr, nullptr,                           \
   }
   
-// Used to define tpidr as a generic tp register
 #define DEFINE_EXTENSION_REG_GENERIC(reg, generic_kind)                        \
   {                                                                            \
     #reg, nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex,                \
diff --git a/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py b/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
index 172f640358f33..2fa963efcc8ff 100644
--- a/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
+++ b/lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py
@@ -53,6 +53,8 @@ def check_registers(self, registers, values):
                 tls_reg.IsValid(), "{} register not found.".format(register)
             )
             self.assertEqual(tls_reg.GetValueAsUnsigned(), values[register])
+            if register == "tpidr":
+                self.expect("reg read tp", substrs=[hex(values[register])])
 
     def check_tls_reg(self, registers):
         self.setup(registers)
@@ -93,8 +95,6 @@ def check_tls_reg(self, registers):
         for register in registers:
             self.expect("p {}_was_set".format(register), substrs=["true"])
 
-        self.expect("reg read tp", substrs=[hex(set_values["tpidr"])])
-
     @skipUnlessArch("aarch64")
     @skipUnlessPlatform(["linux"])
     def test_tls_no_sme(self):



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