[Lldb-commits] [lldb] [lldb] Implement RISCV function unwinding using instruction emulation (PR #147434)

[Jason Molenda via lldb-commits]

jasonmolenda wrote:

If you look at an existing EmulateInstruction target plugin that we live on today, such as ARM64, it returns context types for `UnwindAssemblyInstEmulation` like 

```
eContextAdjustBaseRegister
eContextAdjustStackPointer
eContextAdvancePC
eContextImmediate
eContextPopRegisterOffStack
eContextPushRegisterOnStack
eContextReadOpcode
eContextRegisterLoad
eContextRegisterStore
eContextRelativeBranchImmediate
eContextRestoreStackPointer
eContextSetFramePointer
```

as it is emulating the prologue and epilogue instructions on ARM64.  I don't think the existing `EmulateInstructionRISCV` plugin provides any of these, or at least not the important ones that I spot checked quickly.

https://github.com/llvm/llvm-project/pull/147434