[Lldb-commits] [lldb] [lldb/crashlog] Make registers always available & fix x29/x30 parsing (PR #145104)

[Med Ismail Bennani via lldb-commits]

https://github.com/medismailben created https://github.com/llvm/llvm-project/pull/145104

This patch addresses 2 issues:
1. It makes registers available on non-crashed threads all the time
2. It fixes arm64 registers parsing for registers that don't use the `x` prefix (`fp` -> `x29` / `lr` -> `x30`)

>From 2aff1989b2635bfb40784d58e8b9e4270be2c073 Mon Sep 17 00:00:00 2001
From: Med Ismail Bennani <ismail at bennani.ma>
Date: Fri, 20 Jun 2025 13:48:07 -0700
Subject: [PATCH 1/2] [lldb/crashlog] Always load register context for
 non-crashed threads

This patch change the current crashlog behavior to always load the
register context, even for the non-crashed threads.

This is cheap to compute since it doesn't requires any module loading
and can be helful to investigate some crashes.

rdar://149481943

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
---
 lldb/examples/python/crashlog.py                  | 8 ++++----
 lldb/examples/python/crashlog_scripted_process.py | 5 -----
 2 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/lldb/examples/python/crashlog.py b/lldb/examples/python/crashlog.py
index 5f07cda2892ab..bb20f3a25c1c1 100755
--- a/lldb/examples/python/crashlog.py
+++ b/lldb/examples/python/crashlog.py
@@ -777,10 +777,10 @@ def parse_threads(self, json_threads):
             if json_thread.get("triggered", False):
                 self.crashlog.crashed_thread_idx = idx
                 thread.crashed = True
-                if "threadState" in json_thread:
-                    thread.registers = self.parse_thread_registers(
-                        json_thread["threadState"]
-                    )
+            if "threadState" in json_thread:
+                thread.registers = self.parse_thread_registers(
+                    json_thread["threadState"]
+                )
             if "queue" in json_thread:
                 thread.queue = json_thread.get("queue")
             self.parse_frames(thread, json_thread.get("frames", []))
diff --git a/lldb/examples/python/crashlog_scripted_process.py b/lldb/examples/python/crashlog_scripted_process.py
index be0ed49d35904..2cc5405f3c196 100644
--- a/lldb/examples/python/crashlog_scripted_process.py
+++ b/lldb/examples/python/crashlog_scripted_process.py
@@ -123,11 +123,6 @@ def get_process_metadata(self):
 
 class CrashLogScriptedThread(ScriptedThread):
     def create_register_ctx(self):
-        if not self.has_crashed:
-            return dict.fromkeys(
-                [*map(lambda reg: reg["name"], self.register_info["registers"])], 0
-            )
-
         if not self.backing_thread or not len(self.backing_thread.registers):
             return dict.fromkeys(
                 [*map(lambda reg: reg["name"], self.register_info["registers"])], 0

>From dee0b4013ff764e6b8f82488ec911fbfb70ac3a0 Mon Sep 17 00:00:00 2001
From: Med Ismail Bennani <ismail at bennani.ma>
Date: Fri, 20 Jun 2025 14:14:32 -0700
Subject: [PATCH 2/2] [lldb/crashlog] Fix register parsing for arm64 using
 alternative name

This patch addresses some register parsing issue where certain registers
would not be prefixed by 'x' but rather they where listed using their
alternate name (fp instead of x29, lr instead of x30, etc.)

rdar://149482608

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
---
 lldb/examples/python/crashlog_scripted_process.py | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/lldb/examples/python/crashlog_scripted_process.py b/lldb/examples/python/crashlog_scripted_process.py
index 2cc5405f3c196..f54a8df0479e7 100644
--- a/lldb/examples/python/crashlog_scripted_process.py
+++ b/lldb/examples/python/crashlog_scripted_process.py
@@ -130,8 +130,15 @@ def create_register_ctx(self):
 
         for reg in self.register_info["registers"]:
             reg_name = reg["name"]
+            reg_alt_name = None
+            if "alt-name" in reg:
+                reg_alt_name = reg["alt-name"]
             if reg_name in self.backing_thread.registers:
                 self.register_ctx[reg_name] = self.backing_thread.registers[reg_name]
+            elif reg_alt_name and reg_alt_name in self.backing_thread.registers:
+                self.register_ctx[reg_name] = self.backing_thread.registers[
+                    reg_alt_name
+                ]
             else:
                 self.register_ctx[reg_name] = 0