[Lldb-commits] [lldb] [lldb][AArch64] Correctly invalidate svg when vg is written (PR #140875)

[Jason Molenda via lldb-commits]

jasonmolenda wrote:

Sorry for missing this one earlier.  I'm a little confused about earlier in this method,

```
for (uint32_t i = 0; i < k_num_sme_register; ++i, ++sme_regnum) {
    m_sme_regnum_collection.push_back(sme_regnum);
    m_dynamic_reg_infos.push_back(g_register_infos_sme[i]);
    m_dynamic_reg_infos[sme_regnum].byte_offset =
        m_dynamic_reg_infos[sme_regnum - 1].byte_offset +
        m_dynamic_reg_infos[sme_regnum - 1].byte_size;
    m_dynamic_reg_infos[sme_regnum].kinds[lldb::eRegisterKindLLDB] = sme_regnum;
  }
  lldb_private::RegisterSet sme_regset = g_reg_set_sme_arm64;
  if (has_zt) {
    m_sme_regnum_collection.push_back(sme_regnum);
    m_dynamic_reg_infos.push_back(g_register_infos_sme2[0]);
    m_dynamic_reg_infos[sme_regnum].byte_offset =
        m_dynamic_reg_infos[sme_regnum - 1].byte_offset +
        m_dynamic_reg_infos[sme_regnum - 1].byte_size;
    m_dynamic_reg_infos[sme_regnum].kinds[lldb::eRegisterKindLLDB] = sme_regnum;
    sme_regset.num_registers += 1;
  }
```

At the end of the loops, `sme_regnum` is the index of the final SME register we've added to `m_dynamic_reg_infos`.  Then if we have the ZT0 register, we reuse that index a second time when adding ZT0 don't we.  I don't know if it has anything to do with the issue at hand, but it seems like `sme_regnum` needs to be incremented if `has_zt` and we're adding one more to the vector.

https://github.com/llvm/llvm-project/pull/140875