[Lldb-commits] [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)
David Spickett via lldb-commits
lldb-commits at lists.llvm.org
Wed Apr 23 07:55:29 PDT 2025
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@@ -113,6 +113,14 @@ TEST(ArchSpecTest, TestSetTriple) {
.consume_front("powerpc-apple-darwin"));
EXPECT_EQ(ArchSpec::eCore_ppc_ppc970, AS.GetCore());
+ AS = ArchSpec();
+ EXPECT_TRUE(AS.SetTriple("24-0-apple-unknown"));
+ EXPECT_EQ(uint32_t(llvm::MachO::CPU_TYPE_RISCV), AS.GetMachOCPUType());
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DavidSpickett wrote:
I think I'm missing something here, how does this triple end up with RISCV as the cputype? Does `-unknown` resolve to riscv?
https://github.com/llvm/llvm-project/pull/136785
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