[Lldb-commits] [lldb] [llvm] [lldb] Extended if conditions to support alias names for registers (PR #124475)

[David Spickett via lldb-commits]

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@@ -0,0 +1,37 @@
+# REQUIRES: native && target-riscv64
+# RUN: %clangxx_host %p/Inputs/riscv64-gp-read.cpp -o %t
+# RUN: %lldb -b -s %s %t | FileCheck %s
+process launch
+
+register read --all
+# CHECK-DAG: ra = 0x1
+# CHECK-DAG: sp = 0x2
+# CHECK-DAG: gp = 0x3
+# CHECK-DAG: tp = 0x4
+# CHECK-DAG: t0 = 0x5
+# CHECK-DAG: t1 = 0x6
+# CHECK-DAG: t2 = 0x7
+# CHECK-DAG: s1 = 0x9
+# CHECK-DAG: a0 = 0xa
+# CHECK-DAG: a1 = 0xb
+# CHECK-DAG: a2 = 0xc
+# CHECK-DAG: a3 = 0xd
+# CHECK-DAG: a4 = 0xe
+# CHECK-DAG: a5 = 0xf
+# CHECK-DAG: a6 = 0x10
+# CHECK-DAG: a7 = 0x11
+# CHECK-DAG: s2 = 0x12
+# CHECK-DAG: s3 = 0x13
+# CHECK-DAG: s4 = 0x14
+# CHECK-DAG: s5 = 0x15
+# CHECK-DAG: s6 = 0x16
+# CHECK-DAG: s7 = 0x17
+# CHECK-DAG: s8 = 0x18
+# CHECK-DAG: s9 = 0x19
+# CHECK-DAG: s10 = 0x1a
+# CHECK-DAG: s11 = 0x1b
+# CHECK-DAG: t3 = 0x1c
+# CHECK-DAG: t4 = 0x1d
+# CHECK-DAG: t5 = 0x1e
+# CHECK-DAG: t6 = 0x1f
+# CHECK-DAG: zero = 0x0
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DavidSpickett wrote:

This test needs to be reading the default names and the aliases. So I assume this first part is all the defaults, then you should add something like `register read <list of the alt. names, minus x8>`.

https://github.com/llvm/llvm-project/pull/124475