[Lldb-commits] [lldb] [lldb] Extended if conditions to support alias names for registers (PR #124475)

[David Spickett via lldb-commits]

DavidSpickett wrote:

> I have created two tests.

Which is great, but we need live processes too and I found those, they are in `lldb/test/Shell/Register/` for example `lldb/test/Shell/Register/aarch64-gp-read.test`. For some reason we don't check all registers there just parameter registers, but there's no reason you can't check them all for RISC-V.

It's probably simpler to set each register to `1+register_number` so x0 is 1 and x1 is 2 and so on. Instead of loading values from memory as that example does.

The logic of that test is set all the registers in inline asm, then manually break before the inline asm block finishes, so that compiler generated code doesn't restore the values.

> However, it turned out that register read x8 is not working. I think, there is some edge case because it has fp and s0.

It's very possible that we have never had a register with 3 names before, or we have support for it but the code that checks them doesn't know that.

> I am not sure whether to try to fix this in this PR or another one?

I would investigate why this error happens and if you can fix it, see what the changes look like. It can probably be a PR after this one, that updates the tests now that they work. But we'll keep this one open while you do that in case it makes more sense to bundle them.

If it seems like it's going to be a massive job to fix it, just let us know what you found and I'll take a look too. I don't want to drown you in unexpected work.

https://github.com/llvm/llvm-project/pull/124475