[Lldb-commits] [lldb] 0cf6714 - [lldb][AArch64] Fix GCS register field detection

[David Spickett via lldb-commits]

Author: David Spickett
Date: 2025-01-28T13:50:58Z
New Revision: 0cf6714279d4146ee5d6a5e34195d6fae56ed475

URL: https://github.com/llvm/llvm-project/commit/0cf6714279d4146ee5d6a5e34195d6fae56ed475
DIFF: https://github.com/llvm/llvm-project/commit/0cf6714279d4146ee5d6a5e34195d6fae56ed475.diff

LOG: [lldb][AArch64] Fix GCS register field detection

Fixes c5840cc609a3674cf7453a45946f7e4a2a73590b.

On platforms where UL is 32 bit, like Windows or 32 bit Linux,
this shift was not correct, so we assumed GCS was not present.

Use ULL instead, to match the other HWCAP constants.

Added: 
    

Modified: 
    lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp

Removed: 
    


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diff  --git a/lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
index 1438a45f37d724..042940b7dff6e0 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
@@ -17,7 +17,7 @@
 #define HWCAP_ASIMDHP (1ULL << 10)
 #define HWCAP_DIT (1ULL << 24)
 #define HWCAP_SSBS (1ULL << 28)
-#define HWCAP_GCS (1UL << 32)
+#define HWCAP_GCS (1ULL << 32)
 
 #define HWCAP2_BTI (1ULL << 17)
 #define HWCAP2_MTE (1ULL << 18)