[Lldb-commits] [lldb] [LLDB][ProcessELFCore] Add Description to ProcessELFCore/ELFThread stop reasons (PR #110065)

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github-actions[bot] wrote:

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``````````bash
darker --check --diff -r c71bfc59ee1cec32d56a82476461e242398f82ca...f173ea4f7a2cd3fbbb8621b74266063706806fd8 lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
``````````

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View the diff from darker here.
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``````````diff
--- non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py	2024-10-01 20:18:19.000000 +0000
+++ non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py	2024-10-01 20:21:54.336627 +0000
@@ -197,11 +197,17 @@
 
     @skipIfLLVMTargetMissing("AArch64")
     def test_non_address_bit_memory_corefile(self):
         self.runCmd("target create --core corefile")
 
-        self.expect("thread list", substrs=["stopped", "stop reason = SIGSEGV: address not mapped to object (fault address: 0x0)"])
+        self.expect(
+            "thread list",
+            substrs=[
+                "stopped",
+                "stop reason = SIGSEGV: address not mapped to object (fault address: 0x0)",
+            ],
+        )
 
         # No caching (the program/corefile are the cache) and no writing
         # to memory. So just check that tagged/untagged addresses read
         # the same location.
 

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https://github.com/llvm/llvm-project/pull/110065