[Lldb-commits] [PATCH] D155269: [lldb][AArch64] Add SME streaming vector length pseudo register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett added a comment.

I think in https://reviews.llvm.org/D154926, `lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py` addresses this. If what you mean is you are stopped in streaming mode, you evaluate an expression that may call a function which takes you into another mode.

If not, give me an example and I'll try to test it. This is the first I'm hearing of QSaveRegisterState / QRestoreRegisterState.

> g/G are probably going to fetch / write all the floating point registers and reset the mode if you did a function call while in streaming mode?

We'd have to order them carefully I expect. Or say something like if we're restoring floating point and SVE registers, just ignore the floating point because we're about to supersede it.

I am not 100% sure that one cannot implement streaming SVE as a completely separate register state, I will be checking that today. If you can then it will complicate things in theory.


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https://reviews.llvm.org/D155269