[Lldb-commits] [PATCH] D141816: [lldb] Fix comments referring to BCR_M_IMVA_MATCH

[Saagar Jha via Phabricator via lldb-commits]

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It seems like these were copied from the single-step code and not
updated to match the new flags.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141816

Files:
  lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
  lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp


Index: lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
===================================================================
--- lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
+++ lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
@@ -1011,7 +1011,7 @@
         // We have a thumb breakpoint
         // We have an ARM breakpoint
         m_state.dbg.__bcr[i] =
-            BCR_M_IMVA_MATCH | // Stop on address mismatch
+            BCR_M_IMVA_MATCH | // Stop on address match
             byte_addr_select | // Set the correct byte address select so we only
                                // trigger on the correct opcode
             S_USER |           // Which modes should this breakpoint stop in?
@@ -1025,7 +1025,7 @@
       } else if (size == 4) {
         // We have an ARM breakpoint
         m_state.dbg.__bcr[i] =
-            BCR_M_IMVA_MATCH | // Stop on address mismatch
+            BCR_M_IMVA_MATCH | // Stop on address match
             BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA
             S_USER |       // Which modes should this breakpoint stop in?
             BCR_ENABLE;    // Enable this hardware breakpoint
Index: lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
===================================================================
--- lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
+++ lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
@@ -1491,7 +1491,7 @@
 
         // We have a thumb breakpoint
         // We have an ARM breakpoint
-        dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
+        dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address match
                      byte_addr_select | // Set the correct byte address select
                                         // so we only trigger on the correct
                                         // opcode
@@ -1510,7 +1510,7 @@
       } else if (size == 4) {
         // We have an ARM breakpoint
         dbg.bcr[i] =
-            BCR_M_IMVA_MATCH | // Stop on address mismatch
+            BCR_M_IMVA_MATCH | // Stop on address match
             BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA
             S_USER |       // Which modes should this breakpoint stop in?
             BCR_ENABLE;    // Enable this hardware breakpoint


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