[Lldb-commits] [lldb] d850b34 - Fix: use "using namespace" in a header file.

[via lldb-commits]

Author: Emmmer
Date: 2022-12-16T03:31:10+08:00
New Revision: d850b340a9dd91fdb3c4dddc8328524c721576be

URL: https://github.com/llvm/llvm-project/commit/d850b340a9dd91fdb3c4dddc8328524c721576be
DIFF: https://github.com/llvm/llvm-project/commit/d850b340a9dd91fdb3c4dddc8328524c721576be.diff

LOG: Fix: use "using namespace" in a header file.

Added: 
    

Modified: 
    lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
    lldb/source/Plugins/Instruction/RISCV/RISCVInstructions.h

Removed: 
    


################################################################################
diff  --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
index a582f0811c49..fa921d79d554 100644
--- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
+++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
@@ -18,14 +18,12 @@
 #include "lldb/Utility/Status.h"
 
 namespace lldb_private {
-using namespace llvm;
-using namespace lldb;
 
 class EmulateInstructionRISCV : public EmulateInstruction {
 public:
-  static StringRef GetPluginNameStatic() { return "riscv"; }
+  static llvm::StringRef GetPluginNameStatic() { return "riscv"; }
 
-  static StringRef GetPluginDescriptionStatic() {
+  static llvm::StringRef GetPluginDescriptionStatic() {
     return "Emulate instructions for the RISC-V architecture.";
   }
 
@@ -53,7 +51,7 @@ class EmulateInstructionRISCV : public EmulateInstruction {
 public:
   EmulateInstructionRISCV(const ArchSpec &arch) : EmulateInstruction(arch) {}
 
-  StringRef GetPluginName() override { return GetPluginNameStatic(); }
+  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
 
   bool SupportsEmulatingInstructionsOfType(InstructionType inst_type) override {
     return SupportsThisInstructionType(inst_type);
@@ -64,18 +62,19 @@ class EmulateInstructionRISCV : public EmulateInstruction {
   bool EvaluateInstruction(uint32_t options) override;
   bool TestEmulation(Stream *out_stream, ArchSpec &arch,
                      OptionValueDictionary *test_data) override;
-  Optional<RegisterInfo> GetRegisterInfo(RegisterKind reg_kind,
-                                         uint32_t reg_num) override;
+  llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
+                                               uint32_t reg_num) override;
 
-  Optional<addr_t> ReadPC();
-  bool WritePC(addr_t pc);
+  llvm::Optional<lldb::addr_t> ReadPC();
+  bool WritePC(lldb::addr_t pc);
 
-  Optional<DecodeResult> ReadInstructionAt(addr_t addr);
-  Optional<DecodeResult> Decode(uint32_t inst);
+  llvm::Optional<DecodeResult> ReadInstructionAt(lldb::addr_t addr);
+  llvm::Optional<DecodeResult> Decode(uint32_t inst);
   bool Execute(DecodeResult inst, bool ignore_cond);
 
   template <typename T>
-  std::enable_if_t<std::is_integral_v<T>, Optional<T>> ReadMem(uint64_t addr) {
+  std::enable_if_t<std::is_integral_v<T>, llvm::Optional<T>>
+  ReadMem(uint64_t addr) {
     EmulateInstructionRISCV::Context ctx;
     ctx.type = EmulateInstruction::eContextRegisterLoad;
     ctx.SetNoArgs();
@@ -93,8 +92,8 @@ class EmulateInstructionRISCV : public EmulateInstruction {
     return WriteMemoryUnsigned(ctx, addr, value, sizeof(T));
   }
 
-  RoundingMode GetRoundingMode();
-  bool SetAccruedExceptions(APFloatBase::opStatus);
+  llvm::RoundingMode GetRoundingMode();
+  bool SetAccruedExceptions(llvm::APFloatBase::opStatus);
 
 private:
   /// Last decoded instruction from m_opcode

diff  --git a/lldb/source/Plugins/Instruction/RISCV/RISCVInstructions.h b/lldb/source/Plugins/Instruction/RISCV/RISCVInstructions.h
index b144a7cb2a9d..52a51ca405e5 100644
--- a/lldb/source/Plugins/Instruction/RISCV/RISCVInstructions.h
+++ b/lldb/source/Plugins/Instruction/RISCV/RISCVInstructions.h
@@ -16,24 +16,23 @@
 #include "llvm/ADT/Optional.h"
 
 namespace lldb_private {
-using namespace llvm;
 
 class EmulateInstructionRISCV;
 
 struct Rd {
   uint32_t rd;
   bool Write(EmulateInstructionRISCV &emulator, uint64_t value);
-  bool WriteAPFloat(EmulateInstructionRISCV &emulator, APFloat value);
+  bool WriteAPFloat(EmulateInstructionRISCV &emulator, llvm::APFloat value);
 };
 
 struct Rs {
   uint32_t rs;
-  Optional<uint64_t> Read(EmulateInstructionRISCV &emulator);
-  Optional<int32_t> ReadI32(EmulateInstructionRISCV &emulator);
-  Optional<int64_t> ReadI64(EmulateInstructionRISCV &emulator);
-  Optional<uint32_t> ReadU32(EmulateInstructionRISCV &emulator);
-  Optional<APFloat> ReadAPFloat(EmulateInstructionRISCV &emulator,
-                                bool isDouble);
+  llvm::Optional<uint64_t> Read(EmulateInstructionRISCV &emulator);
+  llvm::Optional<int32_t> ReadI32(EmulateInstructionRISCV &emulator);
+  llvm::Optional<int64_t> ReadI64(EmulateInstructionRISCV &emulator);
+  llvm::Optional<uint32_t> ReadU32(EmulateInstructionRISCV &emulator);
+  llvm::Optional<llvm::APFloat> ReadAPFloat(EmulateInstructionRISCV &emulator,
+                                            bool isDouble);
 };
 
 #define DERIVE_EQ(NAME)                                                        \