[Lldb-commits] [PATCH] D131783: [LLDB][JIT] Set processor for ARM architecture

[Pavel Kosov via Phabricator via lldb-commits]

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Patch sets ARM cpu, before compiling JIT code. This enables FastISel for armv6 and higher CPUs and allows using hardware FPU

~~~

OS Laboratory. Huawei RRI. Saint-Petersburg


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D131783

Files:
  lldb/source/Utility/ArchSpec.cpp
  lldb/test/API/lang/c/fpeval/TestFPEval.py


Index: lldb/test/API/lang/c/fpeval/TestFPEval.py
===================================================================
--- lldb/test/API/lang/c/fpeval/TestFPEval.py
+++ lldb/test/API/lang/c/fpeval/TestFPEval.py
@@ -19,7 +19,6 @@
         # Find the line number to break inside main().
         self.line = line_number('main.c', '// Set break point at this line.')
 
-    @skipIf(archs=no_match(['amd64', 'x86_64', 'arm64'])) # lldb jitter incorrectly evals function with FP args on 32 bit arm
     def test(self):
         """Test floating point expressions while jitter is disabled."""
         self.build()
Index: lldb/source/Utility/ArchSpec.cpp
===================================================================
--- lldb/source/Utility/ArchSpec.cpp
+++ lldb/source/Utility/ArchSpec.cpp
@@ -583,7 +583,6 @@
 
 std::string ArchSpec::GetClangTargetCPU() const {
   std::string cpu;
-
   if (IsMIPS()) {
     switch (m_core) {
     case ArchSpec::eCore_mips32:
@@ -630,6 +629,9 @@
       break;
     }
   }
+
+  if (GetTriple().isARM())
+    cpu = GetTriple().getARMCPUForArch("").str();
   return cpu;
 }
 


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