[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register definition and read/write
David Spickett via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Thu Aug 11 05:51:58 PDT 2022
DavidSpickett added a comment.
The error appears to be:
../../lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h(67,5): error: constant expression evaluates to -1 which cannot be narrowed to type 'uint32_t' (aka 'unsigned int') [-Wc++11-narrowing]
DEFINE_GPR64(pc, LLDB_REGNUM_GENERIC_PC),
So I'm not sure that pitch will fix everything but let's see.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130342/new/
https://reviews.llvm.org/D130342
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