[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register definition and read/write

[Emmmer S via Phabricator via lldb-commits]

Emmmer added a comment.

In D130342#3715622 <https://reviews.llvm.org/D130342#3715622>, @thakis wrote:

> This breaks building on windows: http://45.33.8.238/win/64255/step_4.txt
>
> Please take a look and revert for now if it takes a while to fix.

Yes. This is probably because we don't have a CI configured to enable riscv target.
It should be a simple fix and it is coming, don't worry :)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130342/new/

https://reviews.llvm.org/D130342