[Lldb-commits] [PATCH] D130342: [LLDB][RISCV] Add riscv register stuff
Emmmer S via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Wed Aug 10 06:48:27 PDT 2022
Emmmer updated this revision to Diff 451441.
Emmmer retitled this revision from "[LLDB][RISCV] Add register stuff and make breakpoint work" to "[LLDB][RISCV] Add riscv register stuff".
Emmmer edited the summary of this revision.
Emmmer added a comment.
Address review comments:
- Split the software breakpoint as a separate PR.
- Add `_riscv` suffix to register enums
About vector registers:
- Deleted as they are unused in current codebase, we can add them back if required in the future.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130342/new/
https://reviews.llvm.org/D130342
Files:
lldb/source/Host/common/HostInfoBase.cpp
lldb/source/Plugins/Process/Linux/CMakeLists.txt
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h
lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h
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