[Lldb-commits] [lldb] 552dccf - [LLDB][AArch64][NFC] Fix some clang-format annotations
David Spickett via lldb-commits
lldb-commits at lists.llvm.org
Wed Aug 10 03:23:41 PDT 2022
Author: David Spickett
Date: 2022-08-10T10:22:21Z
New Revision: 552dccf311c6134c6c895328602172821e3efaed
URL: https://github.com/llvm/llvm-project/commit/552dccf311c6134c6c895328602172821e3efaed
DIFF: https://github.com/llvm/llvm-project/commit/552dccf311c6134c6c895328602172821e3efaed.diff
LOG: [LLDB][AArch64][NFC] Fix some clang-format annotations
We don't want the DEFINE_ macros or the array registers
being clang formatted.
RegisterInfos_arm64.h was missing the off annotation and
RegisterInfos_arm64_sve.h needed the off moving to before
the macro definitions.
Added:
Modified:
lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
Removed:
################################################################################
diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index d647fcaa600ad..513ca5a8f10cb 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -484,6 +484,8 @@ static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
#define MISC_FPU_KIND(lldb_kind) LLDB_KIND(lldb_kind)
#define MISC_EXC_KIND(lldb_kind) LLDB_KIND(lldb_kind)
+// clang-format off
+
// Defines a 64-bit general purpose register
#define DEFINE_GPR64(reg, generic_kind) \
{ \
diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
index b2837b8f1e981..f61e3738b8fc2 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
@@ -304,6 +304,8 @@ static uint32_t g_contained_z31[] = {sve_z31, LLDB_INVALID_REGNUM};
// Default offset SVE Z registers and all corresponding pseudo registers
// ( S, D and V registers) is zero and will be configured during execution.
+// clang-format off
+
// Defines sve pseudo vector (V) register with 16-byte size
#define DEFINE_VREG_SVE(vreg, zreg) \
{ \
@@ -333,7 +335,6 @@ static uint32_t g_contained_z31[] = {sve_z31, LLDB_INVALID_REGNUM};
}
static lldb_private::RegisterInfo g_register_infos_arm64_sve_le[] = {
- // clang-format off
// DEFINE_GPR64(name, GENERIC KIND)
DEFINE_GPR64(x0, LLDB_REGNUM_GENERIC_ARG1),
DEFINE_GPR64(x1, LLDB_REGNUM_GENERIC_ARG2),
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