[Lldb-commits] [PATCH] D130899: [LLDB][RISCV] Add riscv register enums

[Emmmer S via Phabricator via lldb-commits]

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According to RISC-V ISA Spec <https://riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf> and riscv-v-spec <https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#3-vector-extension-programmers-model>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130899

Files:
  lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h

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