[Lldb-commits] [PATCH] D130686: [LLDB][RISCV] Add DWARF Registers

[Emmmer S via Phabricator via lldb-commits]

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According to RISC-V DWARF Specification <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc> add RISCV DWARF Registers.

Don't worry about the difference between riscv32 and riscv64, they just have different bytes of registers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130686

Files:
  lldb/source/Utility/RISCV_DWARF_Registers.h

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