[Lldb-commits] [PATCH] D128612: RISC-V big-endian support implementation
James Henderson via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Mon Jun 27 01:14:16 PDT 2022
jhenderson added inline comments.
================
Comment at: llvm/include/llvm/ADT/Triple.h:864
/// Tests whether the target is RISC-V (32- and 64-bit).
bool isRISCV() const {
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Perhaps worth updating to mention big and little endian here, like `isPPC64` above?
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Comment at: llvm/tools/llvm-objcopy/ObjcopyOptions.cpp:304-305
{"elf64-littleriscv", {ELF::EM_RISCV, true, true}},
+ {"elf32-bigriscv", {ELF::EM_RISCV, false, false}},
+ {"elf64-bigriscv", {ELF::EM_RISCV, true, false}},
// PowerPC
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We need llvm-objcopy testing for these new targets.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128612/new/
https://reviews.llvm.org/D128612
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