[Lldb-commits] [lldb] 0231a90 - [lldb][AArch64] Automatically add all extensions to disassembler
David Spickett via lldb-commits
lldb-commits at lists.llvm.org
Tue Apr 12 05:31:48 PDT 2022
Author: David Spickett
Date: 2022-04-12T12:31:43Z
New Revision: 0231a90bc438f728c81087520d8d5d85101ed05b
URL: https://github.com/llvm/llvm-project/commit/0231a90bc438f728c81087520d8d5d85101ed05b
DIFF: https://github.com/llvm/llvm-project/commit/0231a90bc438f728c81087520d8d5d85101ed05b.diff
LOG: [lldb][AArch64] Automatically add all extensions to disassembler
This means we don't have to remember to update this code as much.
This is all tested in lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
which I added previously.
We don't have a way to get the latest base architecture yet
so that remains manual. Having all the extensions specified
will probably be equivalent to the latest architecture version
in any case.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D123582
Added:
Modified:
lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
Removed:
################################################################################
diff --git a/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp b/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
index 930520ad6090b..e4c7e8fa3b83b 100644
--- a/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
+++ b/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
@@ -10,6 +10,7 @@
#include "llvm-c/Disassembler.h"
#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringExtras.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
@@ -22,6 +23,7 @@
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/AArch64TargetParser.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ScopedPrinter.h"
#include "llvm/Support/TargetSelect.h"
@@ -1177,12 +1179,13 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
features_str += "+dspr2,";
}
- // If any AArch64 variant, enable latest ISA with any optional
- // extensions like MTE.
+ // If any AArch64 variant, enable latest ISA with all extensions.
if (triple.isAArch64()) {
- features_str += "+v9.3a,+mte,+sm4,+sha2,+sha3,+aes,+fp16fml,+sve2-aes,+"
- "sve2-sm4,+sve2-sha3,+sve2-bitperm,+f32mm,+f64mm,+tme,+"
- "ls64,+sme,+sme-f64,+sme-i64,+spe,+rand,+brbe";
+ features_str += "+v9.3a,";
+ std::vector<llvm::StringRef> features;
+ // Get all possible features
+ llvm::AArch64::getExtensionFeatures(-1, features);
+ features_str += llvm::join(features, ",");
if (triple.getVendor() == llvm::Triple::Apple)
cpu = "apple-latest";
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