[Lldb-commits] [PATCH] D111454: Move TargetRegistry.(h|cpp) from Support to MC
Reid Kleckner via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Fri Oct 8 14:53:50 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG89b57061f7b7: Move TargetRegistry.(h|cpp) from Support to MC (authored by rnk).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111454/new/
https://reviews.llvm.org/D111454
Files:
clang/lib/CodeGen/BackendUtil.cpp
clang/lib/CodeGen/ObjectFilePCHContainerOperations.cpp
clang/lib/Driver/Driver.cpp
clang/lib/Driver/ToolChain.cpp
clang/lib/Parse/ParseStmtAsm.cpp
clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
clang/tools/driver/cc1_main.cpp
clang/tools/driver/cc1as_main.cpp
clang/unittests/Driver/ToolChainTest.cpp
clang/unittests/Tooling/DependencyScannerTest.cpp
clang/unittests/Tooling/ToolingTest.cpp
lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptExpressionOpts.cpp
lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptExpressionOpts.h
lldb/source/Target/ABI.cpp
llvm/examples/Kaleidoscope/Chapter8/toy.cpp
llvm/include/llvm/MC/TargetRegistry.h
llvm/include/llvm/Support/TargetRegistry.h
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/DWARFLinker/DWARFStreamer.cpp
llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
llvm/lib/ExecutionEngine/ExecutionEngine.cpp
llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
llvm/lib/ExecutionEngine/TargetSelect.cpp
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
llvm/lib/LTO/LTO.cpp
llvm/lib/LTO/LTOBackend.cpp
llvm/lib/LTO/LTOCodeGenerator.cpp
llvm/lib/LTO/LTOModule.cpp
llvm/lib/LTO/ThinLTOCodeGenerator.cpp
llvm/lib/MC/CMakeLists.txt
llvm/lib/MC/MCAsmStreamer.cpp
llvm/lib/MC/MCDisassembler/Disassembler.cpp
llvm/lib/MC/MCDisassembler/MCRelocationInfo.cpp
llvm/lib/MC/MCELFStreamer.cpp
llvm/lib/MC/MCMachOStreamer.cpp
llvm/lib/MC/MCWasmStreamer.cpp
llvm/lib/MC/MCXCOFFStreamer.cpp
llvm/lib/MC/TargetRegistry.cpp
llvm/lib/Object/ELFObjectFile.cpp
llvm/lib/Object/IRObjectFile.cpp
llvm/lib/Object/ModuleSymbolTable.cpp
llvm/lib/Support/CMakeLists.txt
llvm/lib/Support/TargetRegistry.cpp
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
llvm/lib/Target/ARC/ARCAsmPrinter.cpp
llvm/lib/Target/ARC/ARCInstrInfo.cpp
llvm/lib/Target/ARC/ARCSubtarget.cpp
llvm/lib/Target/ARC/ARCTargetMachine.cpp
llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
llvm/lib/Target/ARC/TargetInfo/ARCTargetInfo.cpp
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
llvm/lib/Target/AVR/AVRAsmPrinter.cpp
llvm/lib/Target/AVR/AVRInstrInfo.cpp
llvm/lib/Target/AVR/AVRSubtarget.cpp
llvm/lib/Target/AVR/AVRTargetMachine.cpp
llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
llvm/lib/Target/BPF/BPFAsmPrinter.cpp
llvm/lib/Target/BPF/BPFSubtarget.cpp
llvm/lib/Target/BPF/BPFTargetMachine.cpp
llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp
llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp
llvm/lib/Target/M68k/M68kAsmPrinter.cpp
llvm/lib/Target/M68k/M68kInstrInfo.cpp
llvm/lib/Target/M68k/M68kSubtarget.cpp
llvm/lib/Target/M68k/M68kTargetMachine.cpp
llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
llvm/lib/Target/M68k/TargetInfo/M68kTargetInfo.cpp
llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/lib/Target/MSP430/MSP430Subtarget.cpp
llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
llvm/lib/Target/Mips/MipsSubtarget.cpp
llvm/lib/Target/Mips/MipsTargetMachine.cpp
llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
llvm/lib/Target/RISCV/RISCVSubtarget.cpp
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp
llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
llvm/lib/Target/Sparc/SparcInstrInfo.cpp
llvm/lib/Target/Sparc/SparcSubtarget.cpp
llvm/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp
llvm/lib/Target/TargetMachineC.cpp
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
llvm/lib/Target/VE/TargetInfo/VETargetInfo.cpp
llvm/lib/Target/VE/VEAsmPrinter.cpp
llvm/lib/Target/VE/VEInstrInfo.cpp
llvm/lib/Target/VE/VESubtarget.cpp
llvm/lib/Target/VE/VETargetMachine.cpp
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
llvm/lib/Target/X86/X86AsmPrinter.cpp
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
llvm/lib/Target/XCore/TargetInfo/XCoreTargetInfo.cpp
llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
llvm/lib/Target/XCore/XCoreInstrInfo.cpp
llvm/lib/Target/XCore/XCoreSubtarget.cpp
llvm/lib/Target/XCore/XCoreTargetMachine.cpp
llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
llvm/tools/llc/llc.cpp
llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
llvm/tools/llvm-cfi-verify/lib/FileAnalysis.h
llvm/tools/llvm-cfi-verify/lib/GraphBuilder.cpp
llvm/tools/llvm-cfi-verify/lib/GraphBuilder.h
llvm/tools/llvm-cxxdump/llvm-cxxdump.cpp
llvm/tools/llvm-dwp/llvm-dwp.cpp
llvm/tools/llvm-exegesis/lib/Analysis.h
llvm/tools/llvm-exegesis/lib/LlvmState.cpp
llvm/tools/llvm-exegesis/lib/SchedClassResolution.h
llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
llvm/tools/llvm-exegesis/llvm-exegesis.cpp
llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
llvm/tools/llvm-jitlink/llvm-jitlink.cpp
llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
llvm/tools/llvm-mc/Disassembler.cpp
llvm/tools/llvm-mc/llvm-mc.cpp
llvm/tools/llvm-mca/CodeRegionGenerator.h
llvm/tools/llvm-mca/llvm-mca.cpp
llvm/tools/llvm-ml/Disassembler.cpp
llvm/tools/llvm-ml/llvm-ml.cpp
llvm/tools/llvm-objdump/MachODump.cpp
llvm/tools/llvm-objdump/llvm-objdump.cpp
llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
llvm/tools/llvm-profgen/ProfiledBinary.cpp
llvm/tools/llvm-readobj/llvm-readobj.cpp
llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
llvm/tools/opt/opt.cpp
llvm/tools/sancov/sancov.cpp
llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
llvm/unittests/CodeGen/LexicalScopesTest.cpp
llvm/unittests/CodeGen/MachineInstrTest.cpp
llvm/unittests/CodeGen/PassManagerTest.cpp
llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
(48 more files...)
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