[Lldb-commits] [PATCH] D110914: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

[Pavel Labath via Phabricator via lldb-commits]

labath added a comment.

In D110914#3036079 <https://reviews.llvm.org/D110914#3036079>, @jrtc27 wrote:

> Is this removing this going to be a problem for RISC-V, where the floating-point registers could be 32-bit or 64-bit (or 128-bit in future), depending on which extensions you have?

Is the size of the register fixed for the lifetime of a process ? If yes (it sounds like this is the case), then this is not a problem, as you'd just need to provide the correct definitions when the process is created.

And if their size can change, then it's still should not be a problem, as you can copy the ARM SVE model. (One of the reasons for removing this is to avoid having two ways of doing the same thing.)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D110914/new/

https://reviews.llvm.org/D110914