[Lldb-commits] [lldb] 96c8216 - [lldb][Arm/AArch64] Add basic disassemble tests for Arm/AArch64

[David Spickett via lldb-commits]

Author: David Spickett
Date: 2021-04-13T08:49:48Z
New Revision: 96c82166b6e38fd0c138876fb21d2a61af3cfcac

URL: https://github.com/llvm/llvm-project/commit/96c82166b6e38fd0c138876fb21d2a61af3cfcac
DIFF: https://github.com/llvm/llvm-project/commit/96c82166b6e38fd0c138876fb21d2a61af3cfcac.diff

LOG: [lldb][Arm/AArch64] Add basic disassemble tests for Arm/AArch64

Previously the test would fail if you built on Arm/AArch64
but did not have the x86 llvm backend enabled.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D100192

Added: 
    

Modified: 
    lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py

Removed: 
    


################################################################################
diff  --git a/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py b/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
index 6be7d011df76..d6e0b32f133e 100644
--- a/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
+++ b/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
@@ -32,6 +32,12 @@ def test_disassemble_raw_data(self):
         elif re.match("powerpc64le", arch):
             target = self.dbg.CreateTargetWithFileAndTargetTriple("", "powerpc64le")
             raw_bytes = bytearray([0x00, 0x00, 0x80, 0x38])
+        elif arch == "aarch64":
+            target = self.dbg.CreateTargetWithFileAndTargetTriple("", "aarch64")
+            raw_bytes = bytearray([0x60, 0x0c, 0x80, 0x52])
+        elif arch == "arm":
+            target = self.dbg.CreateTargetWithFileAndTargetTriple("", "arm")
+            raw_bytes = bytearray([0x63, 0x30, 0xa0, 0xe3])
         else:
             target = self.dbg.CreateTargetWithFileAndTargetTriple("", "x86_64")
             raw_bytes = bytearray([0x48, 0x89, 0xe5])
@@ -52,6 +58,12 @@ def test_disassemble_raw_data(self):
         elif re.match("powerpc64le", arch):
             self.assertEqual(inst.GetMnemonic(target), "li")
             self.assertEqual(inst.GetOperands(target), "4, 0")
+        elif arch == "aarch64":
+            self.assertEqual(inst.GetMnemonic(target), "mov")
+            self.assertEqual(inst.GetOperands(target), "w0, #0x63")
+        elif arch == "arm":
+            self.assertEqual(inst.GetMnemonic(target), "mov")
+            self.assertEqual(inst.GetOperands(target), "r3, #99")
         else:
             self.assertEqual(inst.GetMnemonic(target), "movq")
             self.assertEqual(inst.GetOperands(target),