[Lldb-commits] [PATCH] D86417: [lldb] do not propagate eTrapHandlerFrame repeatedly

Luboš Luňák via Phabricator via lldb-commits lldb-commits at lists.llvm.org
Wed Aug 26 00:52:10 PDT 2020


llunak added a comment.

In D86417#2237602 <https://reviews.llvm.org/D86417#2237602>, @jasonmolenda wrote:

> lldb thinks that both frames 1 & 2 are trap handler frames.  They have full register context available for the frame above them on the stack (that is, frames 2 & 3) and frames 2 & 3 were interrupted asynchronously.  This doesn't sound right?  How do we decide what is a trap handler frame?  One way is to look for the 'S' augmentation in the eh_frame / dwarf debug_frame CIE/FDE for the function -

...

> The other way is from the Platform `CalculateTrapHandlerSymbolNames` method.  PlatformLinux sets these to

...

> is one of these wrong?

I don't know. I do have some knowledge about how stack frames and traps work, but the reason I find it hard to explain the actual problem is because I'm not familiar with the LLDB unwind code and struggle to understand what and why it's really doing (e.g. for the "GetSymbolOrFunctionName(m_sym_ctx).AsCString("")" debug output I posted above, I'm still not sure if this printing "abort" means it's finding out information about "abort" or the next frame above it).

> Maybe start with a simpler question -- does `abort` call `raise`?  Like, through a normal CALLQ?

Yes.

  libc.so.6`abort:
  ->  0x7ffff7a56afc <+332>: callq  0x7ffff7a55410            ; raise



> Does `raise` call `__restore_rt`?  Through a normal CALLQ?

No.

  libc.so.6`raise:
  ->  0x7ffff7a5551e <+270>: syscall 
      0x7ffff7a55520 <+272>: movq   0x108(%rsp), %rcx
      0x7ffff7a55528 <+280>: xorq   %fs:0x28, %rcx
      0x7ffff7a55531 <+289>: movl   %r8d, %eax



In D86417#2237743 <https://reviews.llvm.org/D86417#2237743>, @jasonmolenda wrote:

> Minor followup on the 'image show-unwind' output -- I just landed a patch to print when a function or unwindplan are marked as being a trap handler.



  (lldb) image show-unwind -n __restore_rt
  UNWIND PLANS for ld-2.26.so`__restore_rt (start addr 0x7ffff7df2270)
  This function's name is listed by the platform as a trap handler.
  
  Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  
  Assembly language inspection UnwindPlan:
  This UnwindPlan originally sourced from assembly insn profiling
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: yes.
  This UnwindPlan is for a trap handler function: no.
  Address range of this UnwindPlan: [ld-2.26.so.PT_LOAD[0]..text + 107856-0x000000000001a560)
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 
  
  eh_frame UnwindPlan:
  This UnwindPlan originally sourced from eh_frame CFI
  This UnwindPlan is sourced from the compiler: yes.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: yes.
  Address range of this UnwindPlan: [ld-2.26.so.PT_LOAD[0]..text + 107855-0x000000000001a559)
  row[0]:    0: CFA=DW_OP_breg7 +160, DW_OP_deref => rax=[DW_OP_breg7 +144] rdx=[DW_OP_breg7 +136] rcx=[DW_OP_breg7 +152] rbx=[DW_OP_breg7 +128] rsi=[DW_OP_breg7 +112] rdi=[DW_OP_breg7 +104] rbp=[DW_OP_breg7 +120] rsp=[DW_OP_breg7 +160] r8=[DW_OP_breg7 +40] r9=[DW_OP_breg7 +48] r10=[DW_OP_breg7 +56] r11=[DW_OP_breg7 +64] r12=[DW_OP_breg7 +72] r13=[DW_OP_breg7 +80] r14=[DW_OP_breg7 +88] r15=[DW_OP_breg7 +96] rip=[DW_OP_breg7 +168] 
  
  Arch default UnwindPlan:
  This UnwindPlan originally sourced from x86_64 default unwind plan
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: no.
  row[0]:    0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  
  Arch default at entry point UnwindPlan:
  This UnwindPlan originally sourced from x86_64 at-func-entry default
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: not specified.
  This UnwindPlan is for a trap handler function: not specified.
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 
  
  
  UNWIND PLANS for libc.so.6`__restore_rt (start addr 0x7ffff7a555a0)
  This function's name is listed by the platform as a trap handler.
  
  Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  
  Assembly language inspection UnwindPlan:
  This UnwindPlan originally sourced from assembly insn profiling
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: yes.
  This UnwindPlan is for a trap handler function: no.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88624-0x0000000000015a40)
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 
  
  eh_frame UnwindPlan:
  This UnwindPlan originally sourced from eh_frame CFI
  This UnwindPlan is sourced from the compiler: yes.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: yes.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88623-0x0000000000015a39)
  row[0]:    0: CFA=DW_OP_breg7 +160, DW_OP_deref => rax=[DW_OP_breg7 +144] rdx=[DW_OP_breg7 +136] rcx=[DW_OP_breg7 +152] rbx=[DW_OP_breg7 +128] rsi=[DW_OP_breg7 +112] rdi=[DW_OP_breg7 +104] rbp=[DW_OP_breg7 +120] rsp=[DW_OP_breg7 +160] r8=[DW_OP_breg7 +40] r9=[DW_OP_breg7 +48] r10=[DW_OP_breg7 +56] r11=[DW_OP_breg7 +64] r12=[DW_OP_breg7 +72] r13=[DW_OP_breg7 +80] r14=[DW_OP_breg7 +88] r15=[DW_OP_breg7 +96] rip=[DW_OP_breg7 +168] 
  
  Arch default UnwindPlan:
  This UnwindPlan originally sourced from x86_64 default unwind plan
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: no.
  row[0]:    0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  
  Arch default at entry point UnwindPlan:
  This UnwindPlan originally sourced from x86_64 at-func-entry default
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: not specified.
  This UnwindPlan is for a trap handler function: not specified.
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 



  (lldb) image show-unwind -n raise
  UNWIND PLANS for libc.so.6`raise (start addr 0x7ffff7a55410)
  
  Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI plus augmentation from assembly parsing'
  Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  
  Assembly language inspection UnwindPlan:
  This UnwindPlan originally sourced from assembly insn profiling
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: yes.
  This UnwindPlan is for a trap handler function: no.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88224-0x00000000000159e3)
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 
  row[1]:    1: CFA=rsp+16 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  row[2]:   25: CFA=rsp+288 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  row[3]:  301: CFA=rsp+16 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  row[4]:  302: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 
  row[5]:  303: CFA=rsp+288 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  
  eh_frame UnwindPlan:
  This UnwindPlan originally sourced from eh_frame CFI
  This UnwindPlan is sourced from the compiler: yes.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: no.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88224-0x00000000000159e3)
  row[0]:    0: CFA=rsp +8 => rip=[CFA-8] 
  row[1]:    1: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] 
  row[2]:   25: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] 
  row[3]:  301: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] 
  row[4]:  302: CFA=rsp +8 => rbx=[CFA-16] rip=[CFA-8] 
  row[5]:  304: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] 
  
  eh_frame augmented UnwindPlan:
  This UnwindPlan originally sourced from eh_frame CFI plus augmentation from assembly parsing
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: yes.
  This UnwindPlan is for a trap handler function: yes.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88224-0x00000000000159e3)
  row[0]:    0: CFA=rsp +8 => rip=[CFA-8] 
  row[1]:    1: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] 
  row[2]:   25: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] 
  row[3]:  301: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] 
  row[4]:  302: CFA=rsp +8 => rbx=[CFA-16] rip=[CFA-8] 
  row[5]:  304: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] 
  
  Arch default UnwindPlan:
  This UnwindPlan originally sourced from x86_64 default unwind plan
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: no.
  row[0]:    0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  
  Arch default at entry point UnwindPlan:
  This UnwindPlan originally sourced from x86_64 at-func-entry default
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: not specified.
  This UnwindPlan is for a trap handler function: not specified.
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 



  (lldb) image show-unwind -n abort
  UNWIND PLANS for libc.so.6`abort (start addr 0x7ffff7a569b0)
  
  Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI'
  
  Assembly language inspection UnwindPlan:
  This UnwindPlan originally sourced from assembly insn profiling
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: yes.
  This UnwindPlan is for a trap handler function: no.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 93760-0x0000000000017090)
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 
  row[1]:    7: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] 
  row[2]:   93: CFA=rsp+432 => rsp=CFA+0 rip=[CFA-8] 
  row[3]:  105: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] 
  row[4]:  315: CFA=rsp+432 => rsp=CFA+0 rip=[CFA-8] 
  row[5]:  327: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] 
  row[6]:  406: CFA=rsp+432 => rsp=CFA+0 rip=[CFA-8] 
  row[7]:  418: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] 
  
  eh_frame UnwindPlan:
  This UnwindPlan originally sourced from eh_frame CFI
  This UnwindPlan is sourced from the compiler: yes.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: no.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 93760-0x0000000000017090)
  row[0]:    0: CFA=rsp +8 => rip=[CFA-8] 
  row[1]:    7: CFA=rsp+304 => rip=[CFA-8] 
  row[2]:   93: CFA=rsp+432 => rip=[CFA-8] 
  row[3]:  105: CFA=rsp+304 => rip=[CFA-8] 
  row[4]:  315: CFA=rsp+432 => rip=[CFA-8] 
  row[5]:  327: CFA=rsp+304 => rip=[CFA-8] 
  row[6]:  406: CFA=rsp+432 => rip=[CFA-8] 
  row[7]:  418: CFA=rsp+304 => rip=[CFA-8] 
  
  eh_frame augmented UnwindPlan:
  This UnwindPlan originally sourced from eh_frame CFI
  This UnwindPlan is sourced from the compiler: yes.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: yes.
  Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 93760-0x0000000000017090)
  row[0]:    0: CFA=rsp +8 => rip=[CFA-8] 
  row[1]:    7: CFA=rsp+304 => rip=[CFA-8] 
  row[2]:   93: CFA=rsp+432 => rip=[CFA-8] 
  row[3]:  105: CFA=rsp+304 => rip=[CFA-8] 
  row[4]:  315: CFA=rsp+432 => rip=[CFA-8] 
  row[5]:  327: CFA=rsp+304 => rip=[CFA-8] 
  row[6]:  406: CFA=rsp+432 => rip=[CFA-8] 
  row[7]:  418: CFA=rsp+304 => rip=[CFA-8] 
  
  Arch default UnwindPlan:
  This UnwindPlan originally sourced from x86_64 default unwind plan
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: no.
  This UnwindPlan is for a trap handler function: no.
  row[0]:    0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] 
  
  Arch default at entry point UnwindPlan:
  This UnwindPlan originally sourced from x86_64 at-func-entry default
  This UnwindPlan is sourced from the compiler: no.
  This UnwindPlan is valid at all instruction locations: not specified.
  This UnwindPlan is for a trap handler function: not specified.
  row[0]:    0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] 


Repository:
  rLLDB LLDB

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86417/new/

https://reviews.llvm.org/D86417



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