[Lldb-commits] [PATCH] D82855: [LLDB] Send SVE vg register in custom expedited registerset

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid created this revision.
omjavaid added a reviewer: labath.
Herald added subscribers: kristof.beyls, tschuett.
Herald added a reviewer: rengolin.
omjavaid added parent revisions: D79699: Add ptrace register access for AArch64 SVE registers, D77047: AArch64 SVE register infos and core file support.

This patch ovverides GetExpeditedRegisterSet for NativeRegisterContextLinux_arm64 to send vector granule register in expedited register set if SVE mode is selected.


https://reviews.llvm.org/D82855

Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
  lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h


Index: lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
===================================================================
--- lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
+++ lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
@@ -315,6 +315,7 @@
   k_last_sve_arm64 = sve_ffr_arm64,
 
   k_num_registers_arm64_sve,
+  k_num_expedited_registers_arm64_sve = gpr_cpsr_arm64 - gpr_x0_arm64 + 2,
   k_num_sve_registers_arm64 = k_last_sve_arm64 - k_first_sve_arm64 + 1
 
 };
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
@@ -58,6 +58,8 @@
 
   void ConfigureRegisterContext() override;
 
+  const RegisterSet *GetExpeditedRegisterSet() const override;
+
   // Hardware breakpoints/watchpoint management functions
 
   uint32_t NumSupportedHardwareBreakpoints() override;
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -127,6 +127,23 @@
 enum { k_num_register_sets = 3 };
 }
 
+// ARM64 expedited expedited register set.
+static const uint32_t g_expedited_regnums_arm64_sve[] = {
+    gpr_x0_arm64,  gpr_x1_arm64,   gpr_x2_arm64,  gpr_x3_arm64,
+    gpr_x4_arm64,  gpr_x5_arm64,   gpr_x6_arm64,  gpr_x7_arm64,
+    gpr_x8_arm64,  gpr_x9_arm64,   gpr_x10_arm64, gpr_x11_arm64,
+    gpr_x12_arm64, gpr_x13_arm64,  gpr_x14_arm64, gpr_x15_arm64,
+    gpr_x16_arm64, gpr_x17_arm64,  gpr_x18_arm64, gpr_x19_arm64,
+    gpr_x20_arm64, gpr_x21_arm64,  gpr_x22_arm64, gpr_x23_arm64,
+    gpr_x24_arm64, gpr_x25_arm64,  gpr_x26_arm64, gpr_x27_arm64,
+    gpr_x28_arm64, gpr_fp_arm64,   gpr_lr_arm64,  gpr_sp_arm64,
+    gpr_pc_arm64,  gpr_cpsr_arm64, sve_vg_arm64,  LLDB_INVALID_REGNUM};
+static_assert(
+    ((sizeof g_expedited_regnums_arm64_sve /
+      sizeof g_expedited_regnums_arm64_sve[0]) -
+     1) == k_num_expedited_registers_arm64_sve,
+    "g_expedited_regnums_arm64_sve has wrong number of register infos");
+
 // Register sets for ARM64.
 static const RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
     {"General Purpose Registers", "gpr", k_num_gpr_registers_arm64,
@@ -135,6 +152,11 @@
      g_fpu_regnums_arm64},
     {"SVE Registers", "sve", k_num_sve_registers_arm64, g_sve_regnums_arm64}};
 
+// AArch64 SVE expedited registers set
+static const RegisterSet g_expedited_reg_sets_arm64_sve = {
+    "General Purpose Registers", "expedited",
+    k_num_expedited_registers_arm64_sve, g_expedited_regnums_arm64_sve};
+
 std::unique_ptr<NativeRegisterContextLinux>
 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread) {
@@ -1221,4 +1243,13 @@
     return m_sve_ptrace_payload.data();
   }
 
+  const RegisterSet *
+  NativeRegisterContextLinux_arm64::GetExpeditedRegisterSet() const {
+    if (m_sve_state == SVE_STATE::SVE_STATE_FPSIMD ||
+        m_sve_state == SVE_STATE::SVE_STATE_FULL)
+      return &g_expedited_reg_sets_arm64_sve;
+    else
+      return &g_reg_sets_arm64[0];
+  }
+
 #endif // defined (__arm64__) || defined (__aarch64__)


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