[Lldb-commits] [PATCH] D77044: Extend max register size to accommodate AArch64 SVE vector regs
Muhammad Omair Javaid via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Thu Apr 2 04:18:44 PDT 2020
omjavaid marked 2 inline comments as done.
omjavaid added a comment.
In D77044#1954685 <https://reviews.llvm.org/D77044#1954685>, @labath wrote:
> Sounds fairly noncontroversial. I don't think we have too many of these objects floating around, but if it turns out we do, we could switch to a SmallVector to optimize for the common case of smaller registers.
DataExtractor is used for caching register values on stop by gdb-remote register context. RegisterValue is mostly used for passing around register values temporarily during read/write.
================
Comment at: lldb/include/lldb/Utility/RegisterValue.h:264
// register for any supported target.
- uint8_t length;
+ uint32_t length;
lldb::ByteOrder byte_order;
----------------
labath wrote:
> how about we stick to uint16_t here ?
ACK.
================
Comment at: lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:2051
// Parse out the value.
- uint8_t reg_bytes[32]; // big enough to support up to 256 bit ymmN register
+ uint8_t reg_bytes[256]; // big enough to support up to 256 byte AArch64 SVE
+ // registers
----------------
labath wrote:
> danielkiss wrote:
> > Could we use the kMaxRegisterByteSize here?
> An excellent idea.
ACK.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77044/new/
https://reviews.llvm.org/D77044
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